CFT: nested page table integration with amd64/pmap

[Ivan Voras]

On 23/08/2013 00:55, Neel Natu wrote:
> Hi,
> 
> The projects/bhyve_npt_pmap branch modifies the amd64/pmap to be able to
> deal with Intel EPT mappings in addition to the regular x86 page tables.
> 
> This provides bhyve with the following features:
> 
> 1. Memory overcommit
> Guest memory is now pageable and therefore virtual machines can allocate
> more memory than is physically available on the host.

I always wondered about virtualization environments which have pageable
guest memory - how does the guest kernel handle situations where it
really needs non-pageable memory? Does is simply "not care" because for
it the memory access looks just like it isn't paged but is simply very,
very slow? What about time-sensitive situations (like the originally
mentioned PCI-passthrough)?


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