Zotac ID91 USB3 devices attach as USB2 (Solved)
Hans Petter Selasky
hps at selasky.org
Sun Jul 6 03:24:00 UTC 2014
On 07/05/14 20:28, Tur-Wei Chan wrote:
> Hi,
>
> On 1/7/2014 12:17 AM, Tur-Wei Chan wrote:
>> Hi,
>> On 30/6/2014 1:02 AM, Hans Petter Selasky wrote:
>>> On 06/29/14 16:41, Tur-Wei Chan wrote:
>>>> Hi,
>>>>
>>>> Got a Zotac ID91 mini-PC
>>>> (http://www.zotac.com/products/mini-pcs/zbox/product/zbox/detail/zbox-id91-1.html)
>>>>
>>>> recently and installed FreeBSD (10-STABLE, r267719) on it.
>>>>
>>>> Hooking up my Mediasonic ProRaid HUR3-SU3S3 to the USB3 ports however
>>>> showed the drives up at only USB2.0 speeds:
>>>>
>>>
>>> Hi,
>>>
>>> What does "pciconf -lv" say?
>>>
>>> I see you have a Lynx Point USB 3.0. They are a bit troublesome. Have
>>> you played with the port routing mask under hw.usb.xhci ?
>>>
>>> --HPS
>>>
>>
>> pciconf -lv said (as attached previously):
>>
>> xhci0 at pci0:0:20:0: class=0x0c0330 card=0xb20619da chip=0x8c318086
>> rev=0x05 hdr=0x00
>> vendor = 'Intel Corporation'
>> device = 'Lynx Point USB xHCI Host Controller'
>> class = serial bus
>> subclass = USB
>>
>>
>
> I got the disks to attach at USB3.0:
>
> Jul 6 02:00:41 z2 kernel: xhci0: <Intel Lynx Point USB 3.0 controller>
> mem 0xf7d00000-0xf7d0ffff irq 16 at
> Jul 6 02:00:41 z2 kernel: xhci0: 32 byte context size.
> Jul 6 02:00:41 z2 kernel: xhci0: Port routing mask set to 0x00000003
> Jul 6 02:00:41 z2 kernel: usbus0 on xhci0
> ...
> Jul 6 02:00:41 z2 kernel: uhub0: <Intel EHCI root HUB, class 9/0, rev
> 2.00/1.00, addr 1> on usbus1
> Jul 6 02:00:41 z2 kernel: ugen0.1: <0x8086> at usbus0
> ...
> Jul 6 02:02:15 z2 kernel: da0 at umass-sim0 bus 0 scbus2 target 0 lun 0
> Jul 6 02:02:15 z2 kernel: da0: <JMicron Disk0 0104> Fixed Direct Access
> SCSI-6 device
> Jul 6 02:02:15 z2 kernel: da0: Serial Number 00000000000000000000
> Jul 6 02:02:15 z2 kernel: da0: 400.000MB/s transfers
> Jul 6 02:02:15 z2 kernel: da0: 1907729MB (3907029168 512 byte sectors:
> 255H 63S/T 243201C)
> Jul 6 02:02:15 z2 kernel: da0: quirks=0x2<NO_6_BYTE>
> Jul 6 02:02:15 z2 kernel: da1 at umass-sim0 bus 0 scbus2 target 0 lun 1
> Jul 6 02:02:15 z2 kernel: da1: <JMicron Disk1 0104> Fixed Direct Access
> SCSI-6 device
> Jul 6 02:02:15 z2 kernel: da1: Serial Number 00000000000000000000
> Jul 6 02:02:15 z2 kernel: da1: 400.000MB/s transfers
> Jul 6 02:02:15 z2 kernel: da1: 1907729MB (3907029168 512 byte sectors:
> 255H 63S/T 243201C)
> Jul 6 02:02:15 z2 kernel: da1: quirks=0x2<NO_6_BYTE>
>
> usbconfig list:
> ugen1.1: <EHCI root HUB Intel> at usbus1, cfg=0 md=HOST spd=HIGH
> (480Mbps) pwr=SAVE (0mA)
> ugen0.1: <XHCI root HUB 0x8086> at usbus0, cfg=0 md=HOST spd=SUPER
> (5.0Gbps) pwr=SAVE (0mA)
> ugen2.1: <EHCI root HUB Intel> at usbus2, cfg=0 md=HOST spd=HIGH
> (480Mbps) pwr=SAVE (0mA)
> ugen1.2: <product 0x8008 vendor 0x8087> at usbus1, cfg=0 md=HOST
> spd=HIGH (480Mbps) pwr=SAVE (0mA)
> ugen2.2: <product 0x8000 vendor 0x8087> at usbus2, cfg=0 md=HOST
> spd=HIGH (480Mbps) pwr=SAVE (0mA)
> ugen1.3: <USB2.0-CRW Generic> at usbus1, cfg=0 md=HOST spd=HIGH
> (480Mbps) pwr=ON (500mA)
> ugen2.3: <USB Receiver Logitech> at usbus2, cfg=0 md=HOST spd=FULL
> (12Mbps) pwr=ON (98mA)
> ugen0.2: <JMS56x Series JMicron> at usbus0, cfg=0 md=HOST spd=SUPER
> (5.0Gbps) pwr=ON (2mA)
>
> What I did:
> a) Set hw.usb.xhci.xhci_port_route="0x3" in /boot/loader.conf
> b) Fixed /sys/dev/usb/controller/xhci.c as follows:
>
> --- dev/usb/controller/xhci.c (revision 268290)
> +++ dev/usb/controller/xhci.c (working copy)
> @@ -567,7 +567,7 @@
> if (sc->sc_port_route != NULL) {
> /* Route all ports to the XHCI by default */
> sc->sc_port_route(sc->sc_bus.parent,
> - ~xhciroute, xhciroute);
> + xhciroute, ~xhciroute);
> }
> return (0);
> }
>
Hi,
Thank you for input. Does:
hw.usb.xhci.xhci_port_route="0xFFFFFFFC"
work for you instead of fixing xhci.c ?
--HPS
> Previously when I set the port route mask to -1, the xhci init would
> fail. It seems for my H81 board that only ports 1 and 2 are available
> for USB 3.0 [1] so only the value 0x03 for the port route would work for
> me.
>
>
> Regards
>
> -T.W.Chan-
>
> [1] From the document "Intel® 8 Series/C220 Series Chipset Family
> Platform Controller Hub(PCH)"
Is this information available in the PCI address space?
--HPS
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