Richard.Scheffenegger at netapp.com
Tue Jul 30 03:13:27 UTC 2019
I've been looking into the cache line alignment today (because D18811).
Found that the commented cache lines only align to line 3 - then they drift from the comments.
For example, t_rttupdated is defined as u_long (8 bytes), while it really only tracks if at least some (small) number of rtt samples were collected, to start the use of the rtt vars...
Realistically, a uint8_t with a limited increment (if (x<255) x++) would serve the very same function...
Other example: t_sndzerowin (in tcpcb) appears to be only a counter, better placed into the tcpstat structure, where non-functional counters belong IMHO. (perhaps a per-session variant).
And the other variables could probably be defined in the explicit types (uint16/32/64), to be more certain of the alignment - plus making sure that alignment boundaries between different sized types don't result in unintentional shifting of the alignment (like it seems currently to be the case).
Another prime example: struct sackhint is 40 bytes, only 24 of these are actually used; and ideally, sackblks, snd_fack share the same line, while sackhint and snd_holes would do the same (currently, both are distributed across 2) ....
Any appetite to get the (higher) cache lines aligned in tcpcb?
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