svn commit: r237318 - in stable/8: share/man/man4 sys/cam sys/cam/scsi sys/conf

[John Baldwin]

On Friday, June 22, 2012 2:41:35 pm Mike Tancsa wrote:
> Using jhb's handy pciconf from HEAD, I see (pciconf -lvcbe)
> 
> twa0 at pci0:2:0:0:        class=0x010400 card=0x100413c1 chip=0x100413c1 rev=0x01 hdr=0x00
>     vendor     = '3ware Inc'
>     device     = '9650SE SATA-II RAID PCIe'
>     class      = mass storage
>     subclass   = RAID
>     bar   [10] = type Prefetchable Memory, range 64, base 0x81c000000, size 33554432, enabled
>     bar   [18] = type Memory, range 64, base 0xe2420000, size 4096, enabled
>     bar   [20] = type I/O Port, range 32, base 0x4000, size 256, enabled
>     cap 01[40] = powerspec 2  supports D0 D1 D2 D3  current D0
>     cap 05[50] = MSI supports 32 messages, 64 bit 
>     cap 10[70] = PCI-Express 1 legacy endpoint max data 128(512) link x1(x8)
> ecap 0001[100] = AER 1 1 fatal 0 non-fatal 0 corrected
>   PCI-e errors = Fatal Error Detected
>                  Unsupported Request Detected
>          Fatal = Unsupported Request
> 
> 
> Looking at the pciconf output from the older kernel, the unsupported request is there too
> 
> twa0 at pci0:2:0:0:        class=0x010400 card=0x100413c1 chip=0x100413c1 rev=0x01 hdr=0x00
>     vendor     = '3ware Inc'
>     device     = '9650SE SATA-II RAID PCIe'
>     class      = mass storage
>     subclass   = RAID
>     bar   [10] = type Prefetchable Memory, range 64, base 0x81c000000, size 33554432, enabled
>     bar   [18] = type Memory, range 64, base 0xe2420000, size 4096, enabled
>     bar   [20] = type I/O Port, range 32, base 0x4000, size 256, enabled
>     cap 01[40] = powerspec 2  supports D0 D1 D2 D3  current D0
>     cap 05[50] = MSI supports 32 messages, 64 bit 
>     cap 10[70] = PCI-Express 1 legacy endpoint max data 128(512) link x1(x8)
> ecap 0001[100] = AER 1 1 fatal 0 non-fatal 0 corrected
>   PCI-e errors = Fatal Error Detected
>                  Unsupported Request Detected
>          Fatal = Unsupported Request

I think you can ignore these.  I think they happen during POST.

-- 
John Baldwin