kernel MCA messages

[Andriy Gapon]

on 25/08/2010 18:02 Andriy Gapon said the following:
> on 25/08/2010 15:23 John Baldwin said the following:
>> That is because machine checks for corrected errors have to be polled and the 
>> kernel polls once an hour.  On newer Intel CPUs (such as Nehalem) there is a 
>> separate interrupt (CMCI) that can fire for corrected errors.
> 
> I think that on AMD it's possible to configure an interrupt for Bank 4 events as
> well (perhaps other banks too), but I need to refresh my memory of BKDG.

Yeah, for Bank 4 only, configurable via MSR0000_0413 and MSRC000_04[0A:08] Machine
Check Misc 4 (Thresholding) Registers.
Also, see section 2.12.1.6 Error Thresholding in Fam10h BKDG.

-- 
Andriy Gapon