Realtek eth isn't detected in Intel DG31PR mobo
Pyun YongHyeon
pyunyh at gmail.com
Sun Oct 14 18:46:16 PDT 2007
On Sun, Oct 14, 2007 at 03:24:33PM +0300, Abdullah Ibn Hamad Al-Marri wrote:
[...]
> Pyrun,
>
> I hope you are doing well.
>
> Thank you for the patch, and your good attempt to help with this issue.
>
> I spent 2 hours with the patch it did detect the Ethernet as re0 but the
> network did not work at all even though it said connected at auto 100 mbps
> full duplex. The server sent out a packet storm of arp traffic or some kind
> of traffic which caused a lot of problems in my overall network. I'm not
> exactly sure what happened but maybe you know about it. So I removed the
> patch and used the rl0 driver from Realtek again.
>
> It's very strange I didn't see anything like it before.
>
Sorry, please try again with attached patch.
I guess I've misprogrammed Rx filter.
--
Regards,
Pyun YongHyeon
-------------- next part --------------
Index: sys/dev/re/if_re.c
===================================================================
RCS file: /home/ncvs/src/sys/dev/re/if_re.c,v
retrieving revision 1.95
diff -u -r1.95 if_re.c
--- sys/dev/re/if_re.c 14 Aug 2007 02:00:04 -0000 1.95
+++ sys/dev/re/if_re.c 15 Oct 2007 01:43:20 -0000
@@ -180,6 +180,8 @@
"RealTek 8168/8111B PCIe Gigabit Ethernet" },
{ RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN2,
"RealTek 8168/8111B PCIe Gigabit Ethernet" },
+ { RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN3,
+ "RealTek 8168/8111B PCIe Gigabit Ethernet" },
{ RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169,
"RealTek 8169 Gigabit Ethernet" },
{ RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169S,
@@ -221,6 +223,7 @@
{ RL_HWREV_8100E, RL_8169, "8100E"},
{ RL_HWREV_8101E, RL_8169, "8101E"},
{ RL_HWREV_8168_SPIN2, RL_8169, "8168"},
+ { RL_HWREV_8168_SPIN3, RL_8169, "8168"},
{ 0, 0, NULL }
};
@@ -676,14 +679,18 @@
*/
hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
-
- if (hwrev == RL_HWREV_8100E || hwrev == RL_HWREV_8101E ||
- hwrev == RL_HWREV_8168_SPIN1 || hwrev == RL_HWREV_8168_SPIN2) {
+ switch (hwrev) {
+ case RL_HWREV_8100E:
+ case RL_HWREV_8101E:
+ case RL_HWREV_8168_SPIN1:
+ case RL_HWREV_8168_SPIN2:
CSR_WRITE_4(sc, RL_MAR0, bswap32(hashes[1]));
CSR_WRITE_4(sc, RL_MAR4, bswap32(hashes[0]));
- } else {
+ break;
+ default:
CSR_WRITE_4(sc, RL_MAR0, hashes[0]);
CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
+ break;
}
}
@@ -1314,6 +1321,7 @@
case RL_HWREV_8169_8110SB:
case RL_HWREV_8169_8110SC:
case RL_HWREV_8168_SPIN2:
+ case RL_HWREV_8168_SPIN3:
re_gmii_writereg(dev, 1, 0x1f, 0);
re_gmii_writereg(dev, 1, 0x0e, 0);
break;
Index: sys/pci/if_rl.c
===================================================================
RCS file: /home/ncvs/src/sys/pci/if_rl.c,v
retrieving revision 1.170
diff -u -r1.170 if_rl.c
--- sys/pci/if_rl.c 24 Jul 2007 01:24:03 -0000 1.170
+++ sys/pci/if_rl.c 15 Oct 2007 01:43:20 -0000
@@ -756,14 +756,31 @@
hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
bus_release_resource(dev, RL_RES, RL_RID, sc->rl_res);
- /* Don't attach to 8139C+ or 8169/8110 chips. */
- if (hwrev == RL_HWREV_8139CPLUS ||
- (hwrev == RL_HWREV_8169 &&
- t->rl_did == RT_DEVICEID_8169) ||
- hwrev == RL_HWREV_8169S ||
- hwrev == RL_HWREV_8110S) {
+ /*
+ * Don't attach to 8139C+/8169/8169S/8110S/8168
+ * 8111/8101E chips.
+ */
+ switch (hwrev) {
+ case RL_HWREV_8139CPLUS:
+ case RL_HWREV_8110S:
+ case RL_HWREV_8169S:
+ case RL_HWREV_8101:
+ case RL_HWREV_8100:
+ case RL_HWREV_8169_8110SB:
+ case RL_HWREV_8169_8110SC:
+ case RL_HWREV_8168_SPIN1:
+ case RL_HWREV_8100E:
+ case RL_HWREV_8101E:
+ case RL_HWREV_8168_SPIN2:
+ case RL_HWREV_8168_SPIN3:
t++;
continue;
+ case RL_HWREV_8169:
+ if (t->rl_did == RT_DEVICEID_8169) {
+ t++;
+ continue;
+ }
+ break;
}
device_set_desc(dev, t->rl_name);
Index: sys/pci/if_rlreg.h
===================================================================
RCS file: /home/ncvs/src/sys/pci/if_rlreg.h,v
retrieving revision 1.67
diff -u -r1.67 if_rlreg.h
--- sys/pci/if_rlreg.h 24 Jul 2007 01:24:03 -0000 1.67
+++ sys/pci/if_rlreg.h 15 Oct 2007 01:43:20 -0000
@@ -156,6 +156,7 @@
#define RL_HWREV_8100E 0x30800000
#define RL_HWREV_8101E 0x34000000
#define RL_HWREV_8168_SPIN2 0x38000000
+#define RL_HWREV_8168_SPIN3 0x38400000
#define RL_HWREV_8139 0x60000000
#define RL_HWREV_8139A 0x70000000
#define RL_HWREV_8139AG 0x70800000
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