sparc64 setPQL2() [Re: cvs commit: www/en/projects/ideas index.sgml]

[Marius Strobl]

On Mon, Nov 27, 2006 at 08:58:34AM +0100, Alexander Leidinger wrote:
> Quoting Gavin Atkinson <gavin.atkinson at ury.york.ac.uk> (from Sun, 26  
> Nov 2006 16:44:23 +0000):
> 
> >On Sun, 2006-11-26 at 12:05 +0000, Joel Dahl wrote:
> >>joel        2006-11-26 12:05:55 UTC
> >>
> >>  FreeBSD doc repository
> >>
> >>  Modified files:
> >>    en/projects/ideas    index.sgml
> >>  Log:
> >>  Remove the cache detection support entry.  This will be obsolete
> >>  once the superpages stuff hits the tree.
> >
> >:)
> >
> >I actually wrote the code to do that a couple of days ago...
> 
> It can still be MFCed to RELENG_6, so your work was not superflous. I  
> suggest to let the sparc64 guys (CCed) review it.
> 

Looking at the discussion we (Alexander and me) had last year,
setPQL2() would be implemented like in the below patch for
sun4u CPUs < USIII (and joerg@ was supposed to test something
to that effect). According to the associated SYSCTLs the below
version works as expected, though I have no idea what real
world application would be best to test possible benefits so
I just ran time(1) on a bunch of buildworlds (fully disk backed):

E250, 2 * 400MHz USII w/ 2MB 1-way L2 cache:
w/o patch:
vm.stats.pagequeue.page_colors: 32
vm.stats.pagequeue.cachesize: 0
vm.stats.pagequeue.cachenways: 0
vm.stats.pagequeue.prime1: 9
vm.stats.pagequeue.prime2: 5

sample buildworld:
13493.059u 2514.361s 2:20:31.84 189.8%  26383+4238k 30164+2810io 1360pf+0w

w/ patch:
vm.stats.pagequeue.page_colors: 256
vm.stats.pagequeue.cachesize: 2048
vm.stats.pagequeue.cachenways: 1
vm.stats.pagequeue.prime1: 31
vm.stats.pagequeue.prime2: 23

sample buildworld:
13772.094u 2479.763s 2:22:41.27 189.8%  26206+4223k 29891+2813io 1371pf+0w

...which is a bit surprising to me as even though a bit less
system time was spent it took a bit more in wall clock time.
This tendency was consistent over repeated runs.

T1 AC200, 1 * 500MHz USIIe w/ 256kB 4-way L2 cache:
w/o patch:
same SYSCTL values as above...
sample buildworld:
12194.378u 1896.789s 3:58:36.49 98.4%   27126+4324k 30763+2831io 1365pf+0w

w/ patch:
vm.stats.pagequeue.page_colors: 1
vm.stats.pagequeue.cachesize: 256
vm.stats.pagequeue.cachenways: 4
vm.stats.pagequeue.prime1: 1
vm.stats.pagequeue.prime2: 1

sample buildworld:
12271.425u 1946.019s 4:00:14.33 98.6%   27131+4326k 30075+2798io 1399pf+0w

So vm_coloring_init() maybe should also enable page coloring
in this case?
The results are not exactly compelling though I don't mind
committing that setPQL2() implementation.
Gavin, do you have different implementaion or results (better
application...)?

Marius

Index: identcpu.c
===================================================================
RCS file: /mnt/futile/usr/data/bsd/cvs/fbsd/src/sys/sparc64/sparc64/identcpu.c,v
retrieving revision 1.16
diff -u -r1.16 identcpu.c
--- identcpu.c	18 Nov 2006 07:10:51 -0000	1.16
+++ identcpu.c	29 Nov 2006 16:54:24 -0000
@@ -5,14 +5,19 @@
  *
  * As long as the above copyright statement and this notice remain
  * unchanged, you can do what ever you want with this file.
- *
- * $FreeBSD: src/sys/sparc64/sparc64/identcpu.c,v 1.16 2006/11/18 07:10:51 kmacy Exp $
  */
+ 
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: src/sys/sparc64/sparc64/identcpu.c,v 1.16 2006/11/18 07:10:51 kmacy Exp $");
+
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/sysctl.h>
 
+#ifndef SUN4V
+#include <machine/cache.h>
+#endif
 #include <machine/cpufunc.h>
 #include <machine/md_var.h>
 #include <machine/ver.h>
@@ -25,21 +30,22 @@
 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD,
     cpu_model, 0, "Machine model");
 
-#ifndef SUN4V
 int cpu_impl;
-#endif
 
 void setPQL2(int *const size, int *const ways);
 
 void
 setPQL2(int *const size, int *const ways)
 {
+
 #ifdef SUN4V
 /* XXX hardcoding is lame */
 	*size = 3*1024;
 	*ways = 12;
+#else
+	*size = cache.ec_size / 1024;
+	*ways = cache.ec_assoc;
 #endif
-	return;
 }
 
 void