Interrupt Handling with Multiple CPUs

Girish Motwani girish.motwani at
Tue Oct 3 08:12:29 PDT 2006

       I was looking through the FreeBSD 6.1 release code and had the
following questions related to interrupt handling:

1. How are the interrupts distributed to multiple CPUs in an SMP system ? On
i386, from the code it appears that that IRQs are tied to CPUs using a round
robin mechanism whereby a particular interrupt (for eg UART) would always be
serviced on a particular CPU. Is the same model followed on other
architectures ?

2. Is there support for directing the interrupt to any CPU based on the
current load on each CPU ? or round robin the interrupts across CPUs ?
    If yes, then what happens in the following scenario:
    A interrupt arrives and the handler needs to sleep since it needs a
sleep mutex which is owned by some other thread. So it uses the ithread for
that interrupt source to provide the context for sleeping. At this time,
another interrupt of the same type arrives.

Thanks in advance,

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