SMP with HTT disabled
Singh, Vijay
Vijay.Singh at netapp.com
Thu May 26 14:04:29 PDT 2005
Hello, I am trying to disable HTT to run some tests. From dmesg I have:
CPU: Intel(R) Xeon(TM) CPU 2.66GHz (2666.77-MHz 686-class CPU)
Origin = "GenuineIntel" Id = 0xf29 Stepping = 9
Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE
,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,S
SE2,SS,HTT,TM,PBE>
Hyperthreading: 2 logical CPUs
real memory = 1073676288 (1023 MB)
avail memory = 1041121280 (992 MB)
ACPI APIC Table: <A M I OEMAPIC >
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
cpu0 (BSP): APIC ID: 0
cpu1 (AP): APIC ID: 1
# cat /boot/loader.conf
machdep.hlt_logical_cpus=1
And mptable output is below. It seems to me that the kernel does not
bring up the 2nd physical CPU. Am I right or wrong.
br
vijay
========================================================================
=======
MPTable, version 2.0.15
------------------------------------------------------------------------
-------
MP Floating Pointer Structure:
location: BIOS
physical address: 0x000ff780
signature: '_MP_'
length: 16 bytes
version: 1.4
checksum: 0xb4
mode: Virtual Wire
------------------------------------------------------------------------
-------
MP Config Table Header:
physical address: 0x000f8d50
signature: 'PCMP'
base table length: 344
version: 1.4
checksum: 0xec
OEM ID: 'INTEL '
Product ID: 'KingsCanyonC'
OEM table pointer: 0x00000000
OEM table size: 0
entry count: 36
local APIC address: 0xfee00000
extended table length: 124
extended table checksum: 10
------------------------------------------------------------------------
-------
MP Config Base Table Entries:
--
Processors: APIC ID Version State Family Model Step Flags
0 0x14 BSP, usable 15 2 9 0xbfebfbff
--
Bus: Bus ID Type
0 PCI
1 PCI
2 PCI
3 PCI
4 PCI
5 ISA
--
I/O APICs: APIC ID Version State Address
2 0x20 usable 0xfec00000
3 0x20 usable 0xfec80000
4 0x20 usable 0xfec80400
--
I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
ExtINT conforms conforms 5 0 2 0
INT conforms conforms 5 1 2 1
INT conforms conforms 5 0 2 2
INT conforms conforms 5 3 2 3
INT conforms conforms 5 4 2 4
INT conforms conforms 5 6 2 6
INT conforms conforms 5 7 2 7
INT active-hi edge 5 8 2 8
INT conforms conforms 5 10 2 10
INT conforms conforms 5 12 2 12
INT conforms conforms 5 13 2 13
INT conforms conforms 5 14 2 14
INT conforms conforms 5 15 2 15
INT active-lo level 0 31:A 2 18
INT active-lo level 0 31:B 2 17
INT active-lo level 0 29:A 2 16
INT active-lo level 0 29:B 2 19
INT active-lo level 0 29:C 2 18
INT active-lo level 1 4:A 2 21
INT active-lo level 3 1:A 3 4
INT active-lo level 4 1:A 4 0
INT active-lo level 4 1:B 4 1
INT active-lo level 4 2:A 4 4
INT active-lo level 4 2:B 4 5
--
Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
ExtINT conforms conforms 0 0:A 255 0
NMI conforms conforms 0 0:A 255 1
------------------------------------------------------------------------
-------
MP Config Extended Table Entries:
--
System Address Space
bus ID: 0 address type: I/O address
address base: 0x9000
address range: 0x6000
--
System Address Space
bus ID: 0 address type: I/O address
address base: 0x0
address range: 0x100
--
System Address Space
bus ID: 0 address type: memory address
address base: 0xa0000
address range: 0x20000
--
System Address Space
bus ID: 0 address type: memory address
address base: 0xfc200000
address range: 0x2a00000
--
System Address Space
bus ID: 0 address type: prefetch address address base: 0xff600000
address range: 0x500000
--
Bus Heirarchy
bus ID: 5 bus info: 0x01 parent bus ID: 0
--
Compatibility Bus Address
bus ID: 0 address modifier: add
predefined range: 0x00000000
--
Compatibility Bus Address
bus ID: 0 address modifier: add
predefined range: 0x00000001
========================================================================
=======
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