(very OT) Ideal partition schemes (history of partitioning)

[Valeri Galtsev]

> On Aug 29, 2020, at 10:00 PM, Valeri Galtsev <galtsev at kicp.uchicago.edu> wrote:
> 
> 

<snip>
> 
> My time to confess: I’m 63, not much older than you. What I described was in Russia, which was several (or multiple) years behind the rest of the World. Most of technology was a “replica” what West had designed, developed, invented. To justify the word “most” (not all) in previous phrase, I just have to give example of what was created in Russia, not replicated from “behind the border” development. That was BESM-6 (abbreviation from “Fast Electronic Computing Machine” in Russian) The uniqueness of design I haven’t seen in other computers was: the machine level command system was 3-address one. Namely, each machine level command had 4 fields:
> 
> 1. command
> 2. address of first operand
> 3. address of second operand
> 4. address where to put the result
> 
> Here someone should correct me if there is, or rather was, machine like that, as my knowledge of what existed back then is definitely restricted.
> 
> Three address system of machine level commands is wasteful on storage, say, compared to wide spread 2 field commands (command + address of operand). However, everything written and compiled with/for that system of machine level commands is much cleaner, I almost said bug free. Take, say, operation: add what is in storage address A to what is in storage address B and put it into storage address C. BESM-6 has one machine level command to do that. With single address command system this is done by sequence of three commands:
> 
> 1. put what is in storage address A to addition register
> 2. add what is in storage address B to what is in addition register
> 3. save addition register to address C
> 
> All three commands must always be together, in that sequence, no matter what optimization etc. to program is being done. Assembly code is way less transparent in this case compared to 3 address command system, and to write assembler and compiler to be clean, “bug free”, is way simpler task for 3 operand command system. And programming in assembly language is way simpler.
> 
> I really hope, someone mentions other machines with 3 address command system, I really would like to know if the existed. Except BESM-6 which was built of bipolar transistor blocks, and it predecessor BESM-4 build on vacuum tubes.
> 
> Valeri
> 

> On Aug 30, 2020, at 1:43 AM, Doug Hardie <bc979 at lafn.org> wrote:
> 
> 
> -- Doug
> 
>> On 29 August 2020, at 20:00, Valeri Galtsev <galtsev at kicp.uchicago.edu> wrote:
>> 
>> 
>> 
>> 
>> I really hope, someone mentions other machines with 3 address command system, I really would like to know if the existed. Except BESM-6 which was built of bipolar transistor blocks, and it predecessor BESM-4 build on vacuum tubes.
>> 
> 
> According to Wikipedia:
> 
> Due to the large number of bits needed to encode the three registers of a 3-operand instruction, RISC architectures that have 16-bit instructions are invariably 2-operand designs, such as the Atmel AVR, TI MSP430, and some versions of ARM Thumb. RISC architectures that have 32-bit instructions are usually 3-operand designs, such as the ARM, AVR32, MIPS, Power ISA, and SPARC architectures.
> 
> I have no experience with any of those.
> 

Thank you, Doug. You induced my refreshing of memory, and also showed that I didn’t describe clear enough that BESM-6 instruction set. I have my post above for convenience. That BESM-6 machine has instruction set with three operands, and all of three operands can be addresses in memory. But in general 3 operand instruction set can have only one or two operands as memory addresses, the rest can be registers. I looked on wikipedia (I assume, the following is what you referred to):

https://en.wikipedia.org/wiki/Instruction_set_architecture

and of all 3-oprand instruction sets it was only one: CISC by IBM that affors all three operands be adresses in memory (alas, reference to it given on wikipedia doesn’t seem to exist).

Of cource, having an advantage of being really clear and transparent with, very simple assembly code etc, 3-operand with all 3 operands as memory addresses machine instruction set has obvious disadvanate: it needs a lot of memory for program.

Another aspect that was of interest for me was: that BESM-6 was purely Russian design (as opposed to multitude “replicated” designs developed by Western world Russia had). I checked all 3 operand instruction sets, and all of them are of later development. BESM-6 (the latest of BESM-1,… series, the oldest dated 1952) was of as early as 1968. And it survived in production for over 20 years. The 3 operand instruction sets from that wikipedia page are:

ARM - 1985
TI MSP430 -200x (later than 2000)
ARV32 - 2017
MIPS - 1985
Power ISA - 2006
SPARC - 1986
IBM CISC - 2000 (the only one with 3 addresses as operands)

I know from friends who worked in that institution that produced BESM-6 that that was unique design of their institution development. I am just trying to satisfy my own curiosity, whether their machine istruction set with all three operands (two operands and result actually) addressed in memory, thus producing machine code with single machine command per each operation no matter what it is, if that was the first machine instruction set of that sort. I know that the fact that I can not find earlier analogues doesn’t mean they didn’t exist. So, if anybody knows examples of machine instruction set with 3 operands all 3 as memory addresses, used/developed ealier than 1968, I would really appreciate if you let me know. I’m just curious.

Thanks.
Valeri

> -- Doug
>