bqt at update.uu.se
Tue Jun 13 10:21:37 UTC 2006
Marcus Watts wrote:
> Various wrote:
>>From: Otto Moerbeek <otto at drijf.net>
>>To: Ted Mittelstaedt <tedm at toybox.placo.com>
>>What's more, iirc the MMU of the pdp11 isn't what we call a MMU today,
>>it could not even do paging.
> The pdp-11 mmu could handle program relocation, segmentation (after
> a fashion) and memory protection. I'm not sure what more you
> could expect from an mmu. What you mean by "paging" is
> probably "demand paging", which means the ability to run a program
> without requiring that it be entirely resident. The key
> feature you need for that is a guarantee that any instruction fault
> caused by missing memory can be either restarted or continued.
> In most architectures that's a question of cpu design not mmu.
True. But it's mostly a combination of MMU and CPU.
The MMU needs to either abort or trap the offending instruction, and the
CPU needs to know how much side effects had been done so that they can
be undone before a restart.
The PDP-11 MMU can either abort the instruction, or do a trap after the
instruction completes. The CPU have a register telling of register
modifications done, as well as the pre-fetch PC. In additions to this,
the MMU have both an expansion direction, a modified bit, and an
accessed bit. And that is in addition to the protection field and size
field of the page (and the address relocation). So I can't really
imagine anything that you cannot do with the PDP-11 MMU. Heck, there is
even the funny "bypass cache" bit. Useful for multiprocessor systems...
Since the PDP-11 have a different page table for I- and D-space, you can
even have execute-only pages.
> In the case of the pdp-11 that's mostly a moot point. The pdp-11 only
> provides for mapping the 64k of memory space into into 8 segments
> (addressable on 64-byte "clicks") and there's just not much win to
> demand paging 8 "pages". (actually 6 x 8 pages; there was kernel,
> user, and supervisor mode, & each had separate instruction and data
> spaces, but supervisor mode was rarely used in Unix environments, and
> only a few large user mode programs ran using split I/D space.)
2.11BSD uses supervisor mode for the networking parts of the kernel. And
the kernel is all I/D-space, and a bunch of programs are as well. The
development is still contiuing. :-)
> what it's worth, though, I *think* it was possible to restart most
> instructions on the /45 and /70, which were the "big" machines and the
> primary target of most later pdp-11 work.
I don't think there is a single instruction that you can't restart.
Some small, older machines missed a few registers needed for proper
restarts however, and on those things were a bit more of a gamble if you
wanted to go that path.
> In fact, some use was made
> of this feature -- automatic stack growth. If you look through ancient
> Unix source, you'll find interesting bits of kernel code that manage
> There's actually a cheesy way to do demand paging with microprocessors
> that don't support demand paging (such as the original 68000--another
> "16 bit" machine). The way to do this is to run two processors in parallel
> but skewed by one instruction. If the first one does a bad memory fetch,
> then the second one will not have fetched the instruction causing the
> fault so contains restartable machine state. Masscomp sold a machine
> like this once.
Didn't the first Apollos do this?
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: bqt at update.uu.se || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
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