shared cache -- Re: SMP detection

[Chad Leigh -- Shire.Net LLC]

On Aug 30, 2006, at 12:12 PM, backyard wrote:

> with HT disabling in FreeBSD is more for the security
> issues about a potential exploit whereby one process
> in one pipe can access the priveledged information of
> a process in another pipe because the two cores share
> one processor cache and thus one cache table. To my
> knowledge this hasn't been exploited yet.


How is this any different than say an Intel Core Duo or Core 2 Duo?   
I believe they have a shared cache as well for each (real) processor  
core.

Chad

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Chad Leigh -- Shire.Net LLC
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