3 quick questions about stack alignment for powerpc (32-bit) signal handlers

[Justin Hibbits]

I'll take a look at the signal code in the kernel this evening.

-Justin
On Jan 31, 2016 18:41, "Mark Millard" <markmi at dsl-only.net> wrote:

> I have submitted Bug 206810 for this 11.0-CURRENT/clang380-import stack
> alignment problem for TARGET_ARCH=powerpc signal delivery.
>
> ===
> Mark Millard
> markmi at dsl-only.net
>
> On 2016-Jan-31, at 6:08 AM, Roman Divacky <rdivacky at vlakno.cz> wrote:
>
> Fwiw, LLVM expect 16B aligned stack on PowerPC.
>
> On Sun, Jan 31, 2016 at 05:55:20AM -0800, Mark Millard wrote:
> > 3 quick FreeBSD for powerpc (32-bit) questions:
> >
> >
> > A) For PowerPC (32-bit) what is the stack alignment requirement by the
> ABI(s) that FreeBSD targets?
> >
> > B) Are signal handlers supposed to be given that alignment?
> >
> >
> > I ask because signal handlers are at times begin given just 4-byte
> alignment but clang 3.8.0 powerpc's code generation can depend on the
> alignment being more than 4.
> >
> > clang 3.8.0 can calculate addresses by, for example, masking in a 0x4
> relative to what would need to be an aligned address with alignment 8 or
> more instead of adding 0x4 to a more arbitrary address.
> >
> > So far I've only seen less than 8 byte stack alignment via signal
> handler activity.
> >
> >
> > C) Which should be blamed for problems here: clang's code generation,
> FreeBSD's stack alignment handling for signals, or both?
> >
> > ===
> > Mark Millard
> > markmi at dsl-only.net
> >
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