UMA_MD_SMALL_ALLOC

[Nathan Whitehorn]

Peter Grehan wrote:
>>>  A long time ago I talked to Alan Cox about modifying this option so 
>>> it could be done at run-time, and he seemed agreeable.
> 
>  I should clarify: Alan was agreeable to integrating working patches :)

Very well, then :P

The current G5 patch can be found here: 
http://banshee.uchicago.edu/~nwhitehorn/g5.diff.

It has a million kinds of rough edges. If anyone wants to fix them, I'm 
not going to able to touch any of this code for the next week or so 
because of real work. Here are a few current bugs and mysteries:

moea64_syncicache() is currently commented out, since in certain 
circumstances I can't identify and don't make sense, calling 
_syncicache() causes an alignment trap.

3 knobs need to be twiddled to get the kernel to run on G3/G4 machines 
after applying the patch. UMA_MD_SMALL_ALLOC needs to be defined in 
vmparam.h, and the two instances of rfid in trap_subr.S need to be 
changed to rfi. This last bit can easily be done at runtime, but I 
haven't added this yet.

The patch doesn't include the required addition of mmu_oea64.c to 
/sys/conf/files.powerpc.

Adding the OF pages to ofw_pmap instead of the kernel pmap causes an ISI 
on Open Firmware calls because of a null pointer deference. Mysterious. 
There is no real reason to add them to ofw_pmap, though. (I've mapped OF 
directly into the kernel's address space in order to get pages for the 
frame buffer and few other things we got to use BAT for on older systems)

L2 Cache setup and CPU speed printout isn't set up and doesn't work.

No SMP support (though it shouldn't be too terrible to set up).

And, of course, there is no support for the IBM CPC bridges or the 
cascaded OpenPICs.
-Nathan