gdb(1) in the tree
Marcel Moolenaar
marcel at xcllnt.net
Thu Aug 24 04:11:16 UTC 2006
On Aug 23, 2006, at 9:00 PM, Peter Grehan wrote:
> PowerPC has separate non-coherent I and D caches - writing to
> instruction memory requires a a flush of the D cache and an
> invalidate of the I cache for that particular memory address.
>
> This sounds like that type of problem. I'm assuming that gdb uses
> a ptrace write to do the breakpoint. There probably needs to be an
> MD callout after a PT_WRITE_I.
Yes, I was thinking along those lines as well, though I didn't had
the details.
> I'll see if I can work out what NetBSD does.
Ok. In the mean time I'll work on kgdb...
--
Marcel Moolenaar USPA: A-39004 marcel at xcllnt.net
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