HyperThreading on Intel Xeon Haswell, a benefit?

[grarpamp]

> Ohartmann:
> From my experience, mostly compiling FreeBSD sources from scratch
> ...
> a dual core, 4-thread CPU
> at 3.3 GHz takes ~ 60 minutes to build world, the same as a 4-core
> castrated i3 with disabled SMT. Switching off SMT on the dual core
> ...
> Using SMT in some FPU heavy caclulations on Sandy- and Ivy-Bridge CPUs
> (Haswell is not available as XEON to me at this very moment), I see

> Adrian:
> I've done some basic experimenting with SMT on network loads.
> ...
> I've found that a memcpy heavy load (read: normal, non-zero copy


Ohartmann, Adrian...
Good introductory info.
What were your CPU models / lines / sSpec numbers above?
Anyone else?



Expanding...

This evaluation should not be strictly confined to Intel, after
all, AMD has CMT which is similar to HTT (not clear whether it's
on Opteron, FX or APU lines). Though it will probably be 2016 before
AMD really capitalizes and shines on their full architecture vision.
By then Intel will just shift a few gears to match. So we should
probably stay on subject Intel HTT for now.

http://wccftech.com/amds-high-performance-processor-cores-coming-2015-giving-modular-architecture/
http://en.wikipedia.org/wiki/Simultaneous_multithreading
http://en.wikipedia.org/wiki/Hyper-threading
http://forums.anandtech.com/showthread.php?t=2381524

My thought is that the available evaluations of SMT are all 'old'...
discontinued processors, old compilers, old schedulers, etc, all
dating back to the Intel P4 arch. So let's bring this current in
terms of today's Intel Haswell and AMD APU/FX processors,
with new tests and community data. (Opteron is still on an even
'older' architecture [refresh] compared to FX and APU.)

http://anandtech.com/show/8742/amd-announces-carrizo-and-carrizol-next-gen-apus-for-h1-2015
http://wccftech.com/amd-berlin-server-apu-glimpse-upcoming-kaveri-apu-4-steamroller-cores-512-gcn-sps/