packet drop with intel gigabit / marwell gigabit

Jin Guojun [VFFS] g_jin at
Wed Mar 22 18:43:44 UTC 2006

Arne Woerner wrote:

>>Notice that your memory copy speed  will  be one half of it. 
>Why "half"? dd causes two copies but counts each byte just once...
>Maybe "dd" in combination with /dev/zero is not the right way to
>measure memory bandwidth?
It depends on how /dev/null implemented. It may just throw data in water.
If so, dd only does one CPU to memory access. It is not accurate, but
it is a fast way to estimate memory bandwidth. You may write a simple
memory copy program to get a better number.
If you use 64-bit register (like FP register -- double) to do the copy, 
on some CPUs,
you may double memory copy speed. There are number of tricks to improve
system performance.

Also, memory copy speed is slightly higher one half of the memory bandwidth.
This is because only memory read is 100 % cache missing, while memory
write is 100% cache hit. So the memory write speed is based on the last 
level cache
to memory bandwidth + a few cycles overhead for CPU signal the last 
level cache.
For example, 500MB/s memory bandwidth can give you roughly 300 MB/s memory
copy speed, not 250 MB/s.


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