kern/146517: [ath] [wlan] device timeouts for ath wlan device on recent stable.

[Rui Paulo]

The following reply was made to PR kern/146517; it has been noted by GNATS.

From: Rui Paulo <rpaulo at freebsd.org>
To: Alex Kozlov <spam at rm-rf.kiev.ua>
Cc: bug-followup at FreeBSD.org,
 vince at unsane.co.uk
Subject: Re: kern/146517: [ath] [wlan] device timeouts for ath wlan device on recent stable.
Date: Mon, 21 Jun 2010 17:30:30 +0100

 On 21 Jun 2010, at 15:38, Alex Kozlov wrote:
 
 > On Mon, May 31, 2010 at 07:30:04PM +0000, Rui Paulo wrote:
 >>> I confirm this. Atheros 9280, work fine with 8.0R usb stick,
 >>> timeout after few pings with 8.1-BETA1.
 >>> I can try to find a particular commit, that causes this
 >>> regression, if its help.
 >> Yes, please.
 > Sorry for the delay. I think that the culprit is r203959.
 
 Please try this patch.
 
 Index: ar9280_attach.c
 ===================================================================
 --- ar9280_attach.c	(revision 209351)
 +++ ar9280_attach.c	(working copy)
 @@ -346,7 +346,7 @@
  	regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common,
  	    1, regWrites);
  
 -	if (AR_SREV_MERLIN_20(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) {
 +	if (AR_SREV_MERLIN_20_OR_LATER(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) {
  		/* 5GHz channels w/ Fast Clock use different modal values */
  		regWrites = ath_hal_ini_write(ah, &AH9280(ah)->ah_ini_xmodes,
  		    modesIndex, regWrites);
 Index: ar5416_reset.c
 ===================================================================
 --- ar5416_reset.c	(revision 209351)
 +++ ar5416_reset.c	(working copy)
 @@ -636,7 +636,8 @@
  		/* treat channel B as channel G , no  B mode suport in owl */
  		rfMode = IEEE80211_IS_CHAN_CCK(chan) ?
  		    AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM;
 -		if (AR_SREV_MERLIN_20(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) {
 +		if (AR_SREV_MERLIN_20_OR_LATER(ah) &&
 +		    IS_5GHZ_FAST_CLOCK_EN(ah, chan)) {
  			/* phy mode bits for 5GHz channels require Fast Clock */
  			rfMode |= AR_PHY_MODE_DYNAMIC
  			       |  AR_PHY_MODE_DYN_CCK_DISABLE;
 @@ -1126,7 +1127,7 @@
  {
  	uint32_t pll;
  
 -	if (AR_SREV_MERLIN_20(ah) &&
 +	if (AR_SREV_MERLIN_20_OR_LATER(ah) &&
  	    chan != AH_NULL && IEEE80211_IS_CHAN_5GHZ(chan)) {
  		/*
  		 * PLL WAR for Merlin 2.0/2.1
 
 
 Regards,
 --
 Rui Paulo