Is the C3 possible with SMP?

Ian Smith smithi at nimnet.asn.au
Fri Nov 21 17:34:19 PST 2008


On Fri, 21 Nov 2008, Kevin Oberman wrote:
 > > From: martinko <gamato at users.sf.net>
 > > 
 > > Alexandre "Sunny" Kovalenko wrote:
 > > > On Mon, 2008-11-03 at 00:06 +0200, Alexander Motin wrote:
 > > >> Alexandre "Sunny" Kovalenko wrote:
 > > >>>> I have tried to enable C3 state on my Core2Duo laptop and found that it 
 > > >>>> is not working good. System HZ timer stops during CPU sleep. After some 
 > > >>>> investigation I have found that it is due to LAPIC timer used for HZ 
 > > >>>> stopped during C3 state (same as during AMD's C1E).
 > > >>>>
 > > >>>> So the question is: Is it possible (or planned) to make it work somehow? 
 > > >>>> For example, by using some external timer instead of LAPIC's one?
 > > >>>>
 > > >>>> ACPI reports about 20% less idle power consumption with C3 state 
 > > >>>> comparing to C2. It would be interesting to get additional half an hour 
 > > >>>> on battery.
 > > >>>>
 > > >>> You can get half way there by adding
 > > >>>
 > > >>> dev.cpu.1.cx_lowest=C3
 > > >>>
 > > >>> to /etc/sysctl.conf
 > > >> Thanks.
 > > >>
 > > >> 1. Looks like it does not kill the timer.
 > > >> 2. I haven't got any benefit from it in idle state. According to 
 > > >> `acpiconf -i 0` I have about 13 Amps (IMHO more looks like Watts) with 

That'll be Watts, for sure.  13 Amps would be somewhere between ~120W 
and ~180W depending on the battery voltage, and 36 Amps (below) would be 
400W or more .. handy, maybe, for cooking breakfast on your touchpad :)

 > > >> both C2 and this half-to-C3, but only 11 Amps in full C3 (but without 
 > > >> timer).
 > > >> 3. I have got about 10% benefit (33 Amps against 36) when cpu0 is 100% 
 > > >> busy while cpu1 is idle.
 > > >>
 > > > You would not happen to have USB loaded or built into kernel? If you do,
 > > > you will practically never go into C3. What does
 > > > 
 > > > sysctl dev.cpu | grep cx_usage 
 > > > 
 > > > say?
 > > > 
 > > 
 > > Hi,
 > > 
 > > My laptop reports C1 state only:
 > > 
 > > $ sysctl -a | grep cx_
 > > hw.acpi.cpu.cx_lowest: C1
 > > dev.cpu.0.cx_supported: C1/1
 > > dev.cpu.0.cx_lowest: C1
 > > dev.cpu.0.cx_usage: 100.00%
 > > 
 > > But this is Pentium-M and I remember it could use C2 and C3 back with 
 > > 5.x kernel and I'm sure I had USB as I have now.
 > > 
 > > Do you have any idea why I don't have C2/C3 states available anymore ??
 > 
 > Under 7-Stable, my Pentium-M system (ThinkPad T43) shows C1, C2, and
 > C3. Of course, it's not an SMP.
 > dev.cpu.0.cx_supported: C1/1 C2/1 C3/85
 > dev.cpu.0.cx_lowest: C1
 > dev.cpu.0.cx_usage: 100.00% 0.00% 0.00%
 > 
 > cx_supported has nothing to do with the value of cx_lowest. It should
 > simply be what the CPU reports back vi ACPI as to the C states supported
 > on the platform.

Well, except that cx_supported shows the possible values for cx_lowest; 
ie you can only select a value for cx_lowest that's in cx_supported .. 
so it does seem odd that martinko's cx_supported has been limited to C1?

Whether the system ever actually uses the cx_lowest value you select, 
other than C1, is another matter of course.  My T23 (P3-M, 7.0-R) allows 
selection of C3, but only ever uses it if the machine was booted up on 
battery(!) but that might be a BIOS/EC bug that upgrading these may fix.

cheers, Ian


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