Is the C3 possible with SMP?

[Alexandre "Sunny" Kovalenko]

On Sun, 2008-11-02 at 20:46 +0200, Alexander Motin wrote:
> Hi.
> 
> I have tried to enable C3 state on my Core2Duo laptop and found that it 
> is not working good. System HZ timer stops during CPU sleep. After some 
> investigation I have found that it is due to LAPIC timer used for HZ 
> stopped during C3 state (same as during AMD's C1E).
> 
> So the question is: Is it possible (or planned) to make it work somehow? 
> For example, by using some external timer instead of LAPIC's one?
> 
> ACPI reports about 20% less idle power consumption with C3 state 
> comparing to C2. It would be interesting to get additional half an hour 
> on battery.
> 
You can get half way there by adding

dev.cpu.1.cx_lowest=C3

to /etc/sysctl.conf

I do realize that this is not The Solution, but it still saves battery.

HTH,
-- 
Alexandre "Sunny" Kovalenko (Олександр Коваленко)