[RT5350] Boot from flash --> TLB miss (2)

[Stanislav Galabov]

Hi Jason,

Could you please try with the following kernel image:
https://www.dropbox.com/s/nkwzx5omtx3ye7t/kernel.uboot.rt5350?dl=0

Also, could you please post the output of booting your image via tftp,
together with all the steps you used to boot it? I am also interested to
see the steps you took when building the uboot image from the ELF kernel,
could you please share those too?

Thanks in advance.
Best wishes,
Stanislav

On Sun, Jan 3, 2016 at 4:23 AM, Jason Browning <jbrowning at uh.edu> wrote:

> Hi!
> I have an RT5350-based board called a ‘VoCore’
> http://vocore.io
> It’s small - 32M RAM, 16M SPI flash, WiFi, and GPIOs aplenty.
>
> I have a software-dev background and am new to embedded-dev, but
> the FreeBSD documentation and searching this list have brought me
> a long way.  I am now at my limit.
>
> I’ve built kernels for (release)RT305X and (current)RT5350,
> and both work as expected when uploaded as an ELF to RAM and
> kicked-off with U-Boot’s ‘go’ command.  They both fail with the
> following output when booted from on-board SPI flash:
>
> Booting image at bc050000 .
>    Image Name:
>    Created:      2016-01-01   7:14:33 UTC
>    Image Type:   MIPS NetBSD Kernel Image (gzip compressed)
>    Data Size:    1580815 Bytes =  1.5 MB
>    Load Address: 80000000
>    Entry Point:  80000100
>    Load Kernel:  .........................
>
>    Verifying Checksum ... OK
>    Uncompressing Kernel Image ... OK
>
> U-Boot args (from 0 args):
> None
> Environment:
> memsize=32
> initrd_start=0x00000000
> initrd_size=0x0
> flash_start=0x00000000
> flash_size=0x400000
> entry: mips_init()
> Cache info:
>   picache_stride    = 4096
>   picache_loopcount = 8
>   pdcache_stride    = 4096
>   pdcache_loopcount = 4
> cpu0: MIPS Technologies processor v76.150
>   MMU: Standard TLB, 32 entries (4K 16K 64K 256K 1M 16M 64M 256M pg sizes)
>   L1 i-cache: 4 ways of 256 sets, 32 bytes per line
>   L1 d-cache: 4 ways of 128 sets, 32 bytes per line
>   L2 cache: disabled
>   Config1=0xbea3319e<PerfCount,WatchRegs,MIPS16,EJTAG>
>   Config2=0x80000000
>   Config3=0x420
> Physical memory chunk(s):
> 0x3e0000 - 0x1ffffff, 29491200 bytes (7200 pages)
> Maxmem is 0x2000000
> GDB: debug ports: uart
> GDB: current port: uart
> KDB: debugger backends: ddb gdb
> KDB: current backend: ddb
> [ thread pid 0 tid 0 ]
> Stopped at      0x801f43b4
> db> bt
> Tracing pid 0 tid 0 td 0x803646c0
> 8027896c+30 (?,?,?,?) ra 1880364268 sp 0 sz 0
> 8000f1b0+114 (0,?,ffffffff,?) ra 2080364280 sp 1 sz 1
> 8000e4f4+388 (?,?,?,?) ra a8803642a0 sp 0 sz 0
> 8000e990+70 (?,?,?,?) ra 1880364348 sp 0 sz 0
> 800110c8+f4 (?,?,?,?) ra 1a880364360 sp 0 sz 0
> 800f4590+110 (?,?,?,?) ra 3080364508 sp 0 sz 0
> trap+d28 (?,?,?,?) ra c080364538 sp 0 sz 0
> MipsKernGenException+134 (803f1e98,80355f1c,aba9500,0) ra c8803645f8
> sp 100000001 sz 1
> 801f432c+88 (?,?,?,?) ra 20803646c0 sp 0 sz 0
> pid 0
> db> reset
> Trap cause = 2 (TLB miss (load or instr. fetch) - kernel mode)
> panic: trap
> Uptime: 1s
>
> ==
> More info: This board came with U-Boot+OpenWRT installed; per the
> U-Boot config, the FreeBSD kernels were compiled with makeoption
> KERNLOADADDR=0x80100000
> when initiated with ‘go 80100100’ from RAM, and with makeoption
> KERNLOADADDR=0x80000000
> when initiated with ‘bootm bc050000’ from SPI flash.
>
> I’m out of my depth here, but I *think* things go wrong from within
> locore.S ([srcRoot]/sys/mips/mips/locore.S) at ~line:177 where:
>
> PTR_L   a0, TD_PCB(sp)
>
> I say this because the problem-scenario seems to make it out of
> ‘platform_start’
> ([srcRoot]/sys/mips/rt305x/rt305x_machdep.c),
> and also seems never to enter ‘mi_startup’
> ([srcRoot]/sys/mips/kern/init_main.c).
> Additionally, I do not know why the flash_size is reported to be only
> 4M, it’s 16M - verified.
> I’ve not delved into the intricacies of U-Boot yet.
>
> Am I on the wrong track?  I’m at my wit’s end with this problem.
>
> Jason
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