arge1 on TL WDR3600
Eugene Grosbein
eugen at grosbein.net
Thu Oct 29 17:29:38 UTC 2015
On 29.10.2015 23:46, Adrian Chadd wrote:
>>> Right, and this is interrupt storming?
>> Yes, throttled.
> Ok. So when it starts doing that, please do this:
>
> sysctl dev.arge.0.debug=0x12
>
> (0x10 is ERR, 0x02 is INTR.)
>
> I'd like to see what interrupt bits are currently set. Something keeps
> triggering and I'd like to know why.
Here it is:
# sysctl dev.arge.0.debug=0x12interrupt storm detected on "int2"; throttling interrupt source
interrupt storm detected on "int2"; throttling interrupt source
interrupt storm detected on "int2"; throttling interrupt source
interrupt storm detected on "int2"; throttling interrupt source
dev.arge.0.debugarge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
: 0 -> 18
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
# arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int status(intr) = 3<TX_UNDERRUN,TX_PKT_SENT>
arge0: int mask(filter) = db<RX_BUS_ERROR,RX_OVERFLOW,RX_PKT_RCVD,TX_BUS_ERROR,TX_UNDERRUN,TX_PKT_SENT>
arge0: status(filter) = 3<TX_UNDERRUN,TX_PKT_SENT>
And it keeps repeating over and over endlessly.
More information about the freebsd-mips
mailing list