interrupt muxes, bus memory space and other fun amusing things

[Warner Losh]

> So if I were Linux, I'd just implement a mux that pretends to trigger
> interrupts in a much bigger IRQ space. Ie, they map IP0..IP7 to
> irq0..7, then they pick another IRQ range for the AHB interrupts, and
> another IRQ range for the IP2/IP3 interrupt mux. They have a
> hard-coded mux that takes care of triggering the software IRQ based on
> the hardware interrupt and mux register contents.
> 
> So, how should I approach this?

Same way. You’d create an interrupt device that registers an interrupt
for the mux, then farms it out based on the contents of the registers.
The MIPS interrupt handler might need some work (arm did) to
allow this to happen, but it isn’t super difficult (though IIRc it is tedious).

Warner


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