[rfc] implement busdma barrier operation
Warner Losh
imp at bsdimp.com
Wed Oct 9 20:46:28 UTC 2013
On Oct 8, 2013, at 6:33 PM, Adrian Chadd wrote:
>
> I'd like to implement the busdma barrier operation.
You'd like to improve the bus space read and write barrier implementation on MIPS.
> This is required for
> (at least) correct behaviour of devices on the ar9344 (mips74k) core, as
> now I actually need to care about the order of device operations.
Yup. We should have had something like this all along.
You can get rid, I think, of the cache invalidation and write back too, since that's such a huge hit we'll never do that in a generic implementation.
The rest of the change looks good to me.
Warner
> This (and some local uncommitted changes) are required for the ar9344
> ethernet and switchport devices to correctly function.
>
> I've tested this on the other mips24k hardware I have and it works. But
> nothing else (including ath, grr) explicitly uses read/write barriers. I'll
> eventually add them.
>
> I'd like to bounce this to re@ ASAP to get the approval to commit.
>
> Thanks,
>
>
> -adrian
>
>
> Index: sys/mips/mips/bus_space_generic.c
> ===================================================================
> --- sys/mips/mips/bus_space_generic.c (revision 256173)
> +++ sys/mips/mips/bus_space_generic.c (working copy)
> @@ -749,4 +749,8 @@
> if (flags & BUS_SPACE_BARRIER_WRITE)
> mips_dcache_wbinv_all();
> #endif
> + if (flags & BUS_SPACE_BARRIER_READ)
> + rmb();
> + if (flags & BUS_SPACE_BARRIER_WRITE)
> + wmb();
> }
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