CACHE_LINE_SIZE macro.

[Rodney W. Grimes]

The size of, geometry of, or even the existance of a cache should never 
appear in any ABI other than an ABI to query such data.

There should also never be a compile time constant of a machine dependent
value like this, it should be determined at boot/config time.

If at all possible the use of this information should be well contained
to a minimal set of code, as it SHALL change over time.  Even if
no MIPS CPU exists today with a 256 byte line, dont mean I won't decide
to build one tomarrow.  I might also decide to build one with a 2 byte line :-)

What ABI is exposing anything about cache parameters or may be come dependent
on such information?

> Fellow FreeBSD/MIPSists,
> 
> CACHE_LINE_SIZE is being used increasingly-much in ways which may have ABI
> implications, etc.  It is currentyl 2^6, whereas at least the Cavium Octeon
> has cache lines that are actually 2^7 bytes in size.  It would be nice to
> expose the correct value to reduce false line sharing, etc., but making it
> dependent on the CPU type raises ABI issues, as well as questions about how
> to reliably get the right value to userland.  It seems to me that
> increasing it to 2^7 is the most viable approach, but I can imagine there
> might be some concerns about that, so I wanted to run it past this list
> first.  Questions, comments, concerns?  Are there MIPS CPUs with 2^8-byte
> or larger cache lines that we support or will support or which are likely
> coming over the horizon?
> 
> Thanks,
> Juli.
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-- 
Rod Grimes                                                 freebsd at freebsd.org