Missing hack to resolve umass issues on RouterStation Pro

[M. Warner Losh]

In message: <d763ac661003032153l73e89acat6357f8277a7552ac at mail.gmail.com>
            Adrian Chadd <adrian at FreeBSD.org> writes:
: On 4 March 2010 12:53, Alexander Kabaev <kabaev at gmail.com> wrote:
: > Hi,
: >
: > in order to fix issues with umass on RouterStation Pro, I had to
: > fix/hack the kenel in two places. One was related in the way we handled
: > partial cache line invaidations and I committed it to -current already
: > as http://svn.freebsd.org/changeset/base/203080.
: >
: > Another one is a hack that is not suitable for inclusion into official
: > sources, but still is good enough to get RouterStation Pro to work
: > reliably. Get it from here:
: >
: > http://people.freebsd.org/~kan/usb_rspro.diff
: >
: > I would appreciate if people who still have issues getting their
: > USB-attached storage working reliably with RSPro can test it and report
: > success/failure.
: 
: It works fine for me. I do see occasional segfault-on-exec which I
: wonder whether is due to USB or VM/TLB magic; this smells somewhat
: like it could be both. I'll have to re-test things on an NFS root (and
: hope there's not MIPS/rspro-y issues with the NFS and NIC code. :)

That's weird, and something we should track to ground..

: Is this USB alignment patch something that is needed for all MIPS/USB
: stuff, or just this specific SoC. If so, why? And will it potentially
: be an issue with other SoCs?

It is a fundamental flaw in the USB stack.  It co-locates data about
the transfer and the data from the transfer within a cache-line
without the change.  As such, bad thing happen to one set of data
depending on the scenario.  The patch pushes the two apart.

All MIPS chips likely suffer from this problem, although their cache
line sizes differ.  We should export cache-line size in an MI variable
from MD code for all CPUs.  The USB code should use that to allocate
properly aligned data and meta-data buffers for the transfers.

Warner