Is the MIPS kernel buildable from HEAD?

[M. Warner Losh]

In message: <20100826.094630.94843338838666386.imp at bsdimp.com>
            "M. Warner Losh" <imp at bsdimp.com> writes:
: : Also, I think our problem is with the a3 register passed in as part of
: : platform_start() in cavium/octeon_machdep.c.  We have the following in
: : mips/lowcore.S -
: : 
: : #if defined(TARGET_OCTEON)
: :         la      a0, app_descriptor_addr
: :         sw      a3, 0(a0)               /* Store app descriptor ptr */
: : #endif
: : 
: : So we are storing the value of a3 into a global that we later use in
: : octeon32/Octeon_machdep.c -
: 
: Yea.  The old code did that.  We removed it because we were passing a3
: into the platform_start routine directly.  I had to fix some of locore
: to not clobber the a3 register, however, to make it useful...  A quick
: look at locore.S shows 

that I forgot to finish this paragraph...

"shows that all the a* registers aren't used at all, so should be
passed unmodified into platform_start.

Warner