svn commit: r210846 - in head/sys/mips: include mips

[Jayachandran C.]

On Thu, Aug 5, 2010 at 11:43 AM, Alan Cox <alc at cs.rice.edu> wrote:
> Just an observation ...
>
> Jayachandran C. wrote:
>>
>> Author: jchandra
>> Date: Wed Aug  4 14:12:09 2010
>> New Revision: 210846
>> URL: http://svn.freebsd.org/changeset/base/210846
>>
>> Log:
>>  Add 3 level page tables for MIPS in n64.
>>    - 32 bit compilation will still use old 2 level page tables
>>  - re-arrange pmap code so that adding another level is easier
>>  - pmap code for 3 level page tables for n64
>>  - update TLB handler to traverse 3 levels in n64
>>    Reviewed by:        jmallett
>>
>
> [snip]
>>
>>  -              if (pbits != *pte) {
>> -                       if (!atomic_cmpset_int((u_int *)pte, obits,
>> pbits))
>> -                               goto retry;
>> -                       pmap_update_page(pmap, sva, pbits);
>> +                       /* Skip invalid PTEs */
>> +                       if (!pte_test(pte, PTE_V))
>> +                               continue;
>> +retry:
>> +                       obits = pbits = *pte;
>> +                       pa = TLBLO_PTE_TO_PA(pbits);
>> +                       if (page_is_managed(pa) && pte_test(&pbits,
>> PTE_D)) {
>> +                               m = PHYS_TO_VM_PAGE(pa);
>> +                               vm_page_dirty(m);
>> +                               m->md.pv_flags &= ~PV_TABLE_MOD;
>> +                       }
>> +                       pte_clear(&pbits, PTE_D);
>> +                       pte_set(&pbits, PTE_RO);
>> +
>> +                       if (pbits != *pte) {
>> +                               if (!atomic_cmpset_int((u_int *)pte,
>> obits, pbits))
>> +                                       goto retry;
>> +                               pmap_update_page(pmap, sva, pbits);
>> +                       }
>>                }
>>
>
> MIPS doesn't really need to use atomic_cmpset_int() in situations like this
> because the software dirty bit emulation in trap.c acquires the pmap lock.
>  Atomics like this appear to be a carryover from i386 where the
> hardware-managed TLB might concurrently set the modified bit.

Then I guess we should be able to use *pte directly, without pbits,
obits and the retry loop.
Will try this change...

Thanks,
JC.