Alternate scheme for page table page allocation

C. Jayachandran c.jayachandran at gmail.com
Fri Apr 30 23:16:58 UTC 2010


Here's a version which will apply on HEAD (also at
http://sites.google.com/site/cjayachandran/files).

Regards,
JC.

On Fri, Apr 30, 2010 at 4:34 PM, C. Jayachandran
<c.jayachandran at gmail.com> wrote:
> I was looking at a hang I get during 'make -j32 buildworld' on XLR
> SMP, and as far as I can see, it is caused by the way page table pages
> are allocated when we have >512MB memory.
>
> The attached patch
> (http://sites.google.com/site/cjayachandran/files//pmap-page-alloc.patch)
> changes the way pages for the PTE/PDE entries are allocated in systems
> with >512M. This scheme uses vm_phys_alloc_contig to allocate page
> table pages KSEG0 region and  has a UMA zone to cache them. This will
> allow us to avoid multi-TLB misses that happen when we access page
> table entires in the TLB miss handler. I think a similar approach can
> be taken to allocate 8K page-pairs for N32(for >4GB RAM) and N64.
>
> With this patch, 'make -j32 buildworld' consistently works with 32
> cpus  on an XLR is booted SMP with 4GB RAM.  With the current page
> alloc code, I get a hang about an hour into buildworld.
>
> The patch is based off r206712 - I still have not found a fix for the
> crashes I see in versions after that. Please let me know your
> comments,  especially if you can think of a better way of doing this.
> I can make a version of this patch for HEAD if this is acceptable.
>
> JC.
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