i386/119491: [i386] [patch] [request] padlock enable for new
VIA C7 (CentaurHauls) cpuid 0x6d0
be_works_us
be_works_us at yahoo.com
Wed Feb 27 14:36:07 UTC 2008
Dear John.
>I couldn't find any docs that explain the CPUID
>steppings for VIA CPUs, do you know of any?
You can download programming_guide.pdf
http://www.via.com.tw/en/initiatives/padlock/developercenter.jsp
(http://www.via.com.tw/en/downloads/whitepapers/initiatives/padlock/programming_guide.pdf)
There is it in VIA's CPUID table in the Page 4 nat the PDF.
Nehemiah (C5XL) : Type 0 , Family 6, Stepping 3
Nehemiah (C5P) : Type 0 , Family 6, Stepping 8-F
Ruth (C5Q) : Type 0 , Family 6, Stepping 1-7
Esther (C5J) : Type 0 , Family 6, Stepping 8-F
These CPU cannot distinguish it only in CPUID.
The difference of Nehemiah and Esther is CPU featuer flags(SSE2, SSE3, NX bit...).
(umm... patch was not better for CPU name... )
>Seemingly this should be for 'c7' rather than 'c5j'? We use 'c3' for the VIA
>C3 Nehemiah rather than 'c5p'.
I leave the matter of the "name" to you.
If these cpu features(SSE2 and SSE3) becomes effective(bsd.cpu.mk)
and padlock is enabled(initcpu.c),
I do not have any problem.
The "name" is very very small problem(or not problem).
sorry.
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