Fwd: Need a clarification regarding I2C bus frequency in FreeBSD

[Mark Millard]

[Resend to (just the list) from the right account.]

On 2018-Aug-20, at 6:18 AM, Ian Lepore <ian at freebsd.org> wrote:

> On Mon, 2018-08-20 at 11:13 +0300, Daniel Braniss wrote:
>> 
>>> 
>>> On 20 Aug 2018, at 09:49, Daniel Braniss <danny at cs.huji.ac.il> wrote:
>>> 
>>>> . . .
>>> 
>>> hi,
>>> I have similar issues with the allwinner/twsi but I do have a Saleae Logic and here is a nice picture:
>> ah, maybe this is better:
>> 	https://cs.huji.ac.il/~danny/Screen%20Shot%202018-08-20%20at%2011.06.43.png
> . . .
> This has nothing to do with the twsi driver, this is about the ig4
> driver (found in sys/dev/ichiic).
> 
> That screenshot seems to show a bus running at 100KHz like it should
> (although the 62:38 duty cycle is a bit suspicious).

Being a logic analyzer display, it my just be that the threshold
was off from the optimal value. The waveform shape is not really
visible.

The logic analyzer output also shows a thick "rising" edge without the
uparrow symbol. My guess would be that is a rising/falling/rising
sequence that on the scale in use does not show space between edges. In
other words: a glitch on the leading edge side of the intended pulse.
This too might be tied to the threshold used vs . the actual signal
properties: no way to tell from what is shown.



===
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)