A good backtrace from a head -r317820 powerpc random/periodic panic: execution of garbage at 0x0090a030 (in .hash section) [patch now fixed]

[Mark Millard]

While the patch probably is still appropriate,
testing has shown that it is not sufficient
to prevent the periodic/random panics that I
have been getting.


===
Mark Millard
markmi at dsl-only.net

On 2017-May-27, at 2:12 AM, Mark Millard <markmi at dsl-only.net> wrote:

> [Testing shows the prior patch makes the PowerMac
> G5 so-called "Quad Core" hang very early.]
> 
> I forgot to deal with the prepare side of things.
> So, now with both prepare and restore code fixes,
> this code boots.
> 
> # svnlite diff /usr/src/sys/powerpc/ofw/ofw_machdep.c                                                                                                                                      Index: /usr/src/sys/powerpc/ofw/ofw_machdep.c
> ===================================================================
> --- /usr/src/sys/powerpc/ofw/ofw_machdep.c	(revision 317820)
> +++ /usr/src/sys/powerpc/ofw/ofw_machdep.c	(working copy)
> @@ -111,26 +111,27 @@
> 	 * Assume that interrupt are disabled at this point, or
> 	 * SPRG1-3 could be trashed
> 	 */
> -#ifdef __powerpc64__
> -	__asm __volatile("mtsprg1 %0\n\t"
> -	    		 "mtsprg2 %1\n\t"
> -			 "mtsprg3 %2\n\t"
> -			 :
> -			 : "r"(ofmsr[2]),
> -			 "r"(ofmsr[3]),
> -			 "r"(ofmsr[4]));
> -#else
> -	__asm __volatile("mfsprg0 %0\n\t"
> -			 "mtsprg0 %1\n\t"
> -	    		 "mtsprg1 %2\n\t"
> -	    		 "mtsprg2 %3\n\t"
> -			 "mtsprg3 %4\n\t"
> -			 : "=&r"(ofw_sprg0_save)
> -			 : "r"(ofmsr[1]),
> -			 "r"(ofmsr[2]),
> -			 "r"(ofmsr[3]),
> -			 "r"(ofmsr[4]));
> +#ifndef __powerpc64__
> +	if (!(cpu_features & PPC_FEATURE_64))
> +		__asm __volatile("mfsprg0 %0\n\t"
> +				 "mtsprg0 %1\n\t"
> +	    			 "mtsprg1 %2\n\t"
> +	    			 "mtsprg2 %3\n\t"
> +				 "mtsprg3 %4\n\t"
> +				 : "=&r"(ofw_sprg0_save)
> +				 : "r"(ofmsr[1]),
> +				 "r"(ofmsr[2]),
> +				 "r"(ofmsr[3]),
> +				 "r"(ofmsr[4]));
> +	else
> #endif
> +		__asm __volatile("mtsprg1 %0\n\t"
> +	    			 "mtsprg2 %1\n\t"
> +				 "mtsprg3 %2\n\t"
> +				 :
> +				 : "r"(ofmsr[2]),
> +				 "r"(ofmsr[3]),
> +				 "r"(ofmsr[4]));
> }
> 
> static __inline void
> @@ -147,7 +148,8 @@
> 	 * PCPU data cannot be used until this routine is called !
> 	 */
> #ifndef __powerpc64__
> -	__asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save));
> +	if (!(cpu_features & PPC_FEATURE_64))
> +		__asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save));
> #endif
> }
> #endif