irq cpu binding

[Slawa Olhovchenkov]

On Sat, Mar 28, 2015 at 12:33:52PM -0700, Adrian Chadd wrote:

> That's done deferred by the bus interrupt wiring. That's something
> John's been looking into as part of the general NUMA work (and I'm
> trying to debug right now, on dual-socket boxes with ixgbe. :-)
> 
> Look at bus_bind_intr() and the twisty path to intr_event_bind(), then
> x86/x86/intr_machdep.c:intr_assign_cpu(), then intr_shuffle_cpus() at
> boot, versus what happens via calls to pic_assign_cpu to setup the
> wiring.

I am do simple, ugle hack ixgbe driver for let start cpu binding.
I am still see ixgbe in pmc output.

What may be wrong?
What may be miss?

=====
static int ixgbe_start_cpu = 0;
TUNABLE_INT("hw.ix.start_cpu", &ixgbe_start_cpu);
SYSCTL_INT(_hw_ix, OID_AUTO, start_cpu, CTLFLAG_RDTUN, &ixgbe_start_cpu, 0,
    "Start CPU for next IRQ binding");

[...]
                if (adapter->num_queues > 1)
                        bus_bind_intr(dev, que->res, i+ixgbe_start_cpu);

#ifndef IXGBE_LEGACY_TX
                TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr);
#endif
                TASK_INIT(&que->que_task, 0, ixgbe_handle_que, que);
                que->tq = taskqueue_create_fast("ixgbe_que", M_NOWAIT,
                    taskqueue_thread_enqueue, &que->tq);
                taskqueue_start_threads(&que->tq, 1, PI_NET, "%s que",
                    device_get_nameunit(adapter->dev));
        }
        ixgbe_start_cpu += adapter->num_queues;