IOAT driver for FreeBSD

Vijay Singh vijju.singh at gmail.com
Fri Sep 26 17:10:42 UTC 2014


Jim, since the device IDs were changed, were there any changes to the
descriptors for the DMA part?

=vijay

On Thu, Sep 25, 2014 at 4:41 PM, Jim Harris <jim.harris at gmail.com> wrote:

>
>
> On Tue, Sep 23, 2014 at 5:38 PM, hiren panchasara <hiren at freebsd.org>
> wrote:
>
>> + Jim
>>
>> On Thu, Sep 4, 2014 at 9:30 AM, Andrey V. Elsukov <bu7cher at yandex.ru>
>> wrote:
>> > On 03.09.2014 20:59, Vijay Singh wrote:
>> >> Hi All, I found some discussion in the past about this. Is there a
>> version
>> >> of such a driver that I can test, and hopefully help get committed?
>> >
>> > There was some work in
>> >
>> http://svnweb.freebsd.org/base/user/jimharris/ioat/sys/dev/ioat/
>>
>> Hi Jim,
>>
>> Whats the status of this user branch?
>>
>> cheers,
>> Hiren
>>
>
> This user branch is a couple of years old, but should not be too difficult
> to bring forward to HEAD.  It only includes E5 v1 (Sandy Bridge Xeon)
> device IDs so would need to be updated to include E5 v2 (Ivy Bridge) and v3
> (Haswell) device IDs.
>
> Note this driver only does DMA operations currently and is not plumbed for
> other opcodes (XOR/P+Q, CRC, etc.)  But the general framework is there to
> add code for the other opcodes.
>
> E5 v2 and v3 device IDs are pasted below.
>
> -Jim
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB0 0x0e20
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB1 0x0e21
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB2 0x0e22
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB3 0x0e23
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB4 0x0e24
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB5 0x0e25
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB6 0x0e26
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB7 0x0e27
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB8 0x0e2e
>
> #define PCI_DEVICE_ID_INTEL_IOAT_IVB9 0x0e2f
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW0 0x2f20
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW1 0x2f21
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW2 0x2f22
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW3 0x2f23
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW4 0x2f24
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW5 0x2f25
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW6 0x2f26
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW7 0x2f27
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW8 0x2f2e
>
> #define PCI_DEVICE_ID_INTEL_IOAT_HSW9 0x2f2f
>
>


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