[RFC] Enabling invariant TSC timecounter on SMP

[Andriy Gapon]

on 01/06/2011 23:55 Jung-uk Kim said the following:
> Yes, it's still a work-in-progress.  However, I thought it is good 
> enough for 9.0 inclusion.  BTW, the latest patch is here:
> 
> http://people.freebsd.org/~jkim/tsc_smp_test5.diff
> 
> FYI, the only meaningful change from the previous version is that it's 
> limited to AMD single-socket Bulldozer platforms and Intel Core and 
> later platforms.  We may add more quirks if needed, of course.

Looks good, but I think that the check is a little bit unfair to AMD Family 10h+
CPUs.  Although TSCs in those CPUs are per core I've never seen them drift out
of sync if they started with the same value.

[snip]

> Consecutive RDTSCs used on a same CPU is always incremental but we 
> cannot 100% guarantee that on two cores, even if TSC is derived from 
> the same clock.  I am hoping at least latency difference (I believe 
> it's about few tens of cycles max) is "eaten up" by lowering 
> resolution.  It's not perfect but it's better than serialization 
> (Linux) or heuristics (OpenSolaris), just because there are few rare 
> conditions to consider.  Thoughts?

I am still not sure which case this code should solve.

Thread T1: x1 = rdtsc() on CPU1;
Thread T1: x2 = rdtsc() on CPU2;
x2 < x1 ?
Or?

-- 
Andriy Gapon