Weird PCI interrupt delivery problem

[John Baldwin]

On Monday 05 December 2005 10:52 pm, Craig Boston wrote:
> On Mon, Dec 05, 2005 at 07:51:29PM -0600, Craig Boston wrote:
> > With the ACPI timer disabled (debug.acpi.disabled=timer), the ACPI+APIC
> > case now behaves the same as the plain APIC case.  Each IRQ gets
> > anywhere from 10,000-500,000 interrupts before it simply stops working.
>
> And to follow up to myself yet again, the i8254 timecounter is also bad
> news for APIC.  Switching to it, with or without ACPI, causes things to
> stop working really fast.
>
> Just a stab in the dark, but it sounds like there may be something
> screwy going on in the interconnect between the I/O APIC and the 8259s.
> I'm pretty familiar with old-style (ISA) design, but somewhat fuzzy on
> exactly how those two normally coexist, especially when everything is
> integrated together on a bridge chip somewhere.
>
> IIRC there used to be some mixed-mode hacks that have been cleaned up in
> 6.0.  Might Windows still be doing something similar and that's why it
> works?

No, Windows doesn't use mixed mode.  That stuff only had to do with routing 
IRQ0 anyways.  We use the lapic timer instead of IRQ0 now (as does Windows).

-- 
John Baldwin <jhb at FreeBSD.org>  <><  http://www.FreeBSD.org/~jhb/
"Power Users Use the Power to Serve"  =  http://www.FreeBSD.org