OHCI 1.2

[Katsushi Kobayashi]

Hi,

I don't have any information for OHCI1.2. In my previous experience,
some OHCI chip set does not work when not zeroing undefined register
field. I thought this kind of issue is "sometimes" led by the difference
of implementation, not by the specification.
I have quick reviewed TSB82AA2 technical document published by TI.
The document re-iterates the OHCI information, not only describes
TI specific issues.




On Wednesday, August 20, 2003, at 09:08  AM, Hidetoshi Shimokawa wrote:

> At Wed, 20 Aug 2003 01:56:26 +0900,
> Katsushi Kobayashi wrote:
>>
>> What chipset is your target ?
>>
>> I am not sure whether OHCI2.0 is ready or not.
>>
>> For example, TI's 1394b link layer controller (TSB82AA2) has some
>> special
>> registers the extension of OHCI1.1. TI called it as OHCI1.1+.
>>
>> Thanks,
>
> Yes, the target is TSB82AA2. The OHCI1.2 is listed as reference in its
> datasheet(1.3 Related Documents). It seems that there are some
> extenstions(*1) in stream packet format in OHCI1.1+/1.2 rather than
> registers. As you know, OHCI packet format is somewhat different from
> 1394 packet format.
>
> Do you have any information about difference between 1.1 and 1.1+ or
> 1.2?
>
> (*) I observed some strange behavior if we don't fill reserved field
> with zero.
>
>>
>> On 2003.Aug.20, at 12:37  AM, Hidetoshi Shimokawa wrote:
>>
>>> Does anyone know where I can get the 1394 OHCI 1.2 specification?
>>>
>>> 1394b chips seems to use some fields reserved in OHCI1.1.
>>>
>
> /\ Hidetoshi Shimokawa
> \/  simokawa at sat.t.u-tokyo.ac.jp
> PGP public key: http://www.sat.t.u-tokyo.ac.jp/~simokawa/pgp.html