Opteron 6100-series "Magny-Cours" [Was: [HEADSUP] new x86 smp topology detection code]
Andriy Gapon
avg at FreeBSD.org
Thu Apr 7 09:34:33 UTC 2016
If anyone uses FreeBSD head on a system with "Magny-Cours" CPU(s), could you
please test the following patch?
http://dpaste.com/0XRSXZB.txt
I am interested in kern.sched.topology_spec sysctl before and after the patch.
Also, lines containing "ID shift" from a dmesg of a verbose boot (before and after).
Thank you!
On 04/04/2016 19:31, Andriy Gapon wrote:
>
>
> I've just committed new code for detecting SMP (processor and cache) topology on
> x86 systems. Please be aware.
>
> If you get any panics or crashes that look like they might be caused by this
> change please send a copy of a report to me.
>
> Another thing to watch is kern.sched.topology_spec.
> Please check if the reported topology reasonably matches what you expect on your
> system.
> You can install hwloc package (devel/hwloc) and then run lstopo -p --no-io to
> double-check the topology (--output-format ascii would produce a nice ASCII-art
> diagram).
>
> I hope that you see only improvements :-)
>
> -------- Forwarded Message --------
> Subject: svn commit: r297558 - in head/sys: kern sys x86/x86
> Date: Mon, 4 Apr 2016 16:09:29 +0000 (UTC)
> From: Andriy Gapon <avg at freebsd.org>
> To: src-committers at freebsd.org, svn-src-all at freebsd.org, svn-src-head at freebsd.org
>
> Author: avg
> Date: Mon Apr 4 16:09:29 2016
> New Revision: 297558
> URL: https://svnweb.freebsd.org/changeset/base/297558
>
> Log:
> new x86 smp topology detection code
>
> Previously, the code determined a topology of processing units
> (hardware threads, cores, packages) and then deduced a cache topology
> using certain assumptions. The new code builds a topology that
> includes both processing units and caches using the information
> provided by the hardware.
>
> At the moment, the discovered full topology is used only to creeate
> a scheduling topology for SCHED_ULE.
> There is no KPI for other kernel uses.
>
> Summary:
> - based on APIC ID derivation rules for Intel and AMD CPUs
> - can handle non-uniform topologies
> - requires homogeneous APIC ID assignment (same bit widths for ID
> components)
> - topology for dual-node AMD CPUs may not be optimal
> - topology for latest AMD CPU models may not be optimal as the code is
> several years old
> - supports only thread/package/core/cache nodes
>
> Todo:
> - AMD dual-node processors
> - latest AMD processors
> - NUMA nodes
> - checking for homogeneity of the APIC ID assignment across packages
> - more flexible cache placement within topology
> - expose topology to userland, e.g., via sysctl nodes
>
> Long term todo:
> - KPI for CPU sharing and affinity with respect to various resources
> (e.g., two logical processors may share the same FPU, etc)
>
> Reviewed by: mav
> Tested by: mav
> MFC after: 1 month
> Differential Revision: https://reviews.freebsd.org/D2728
>
> Modified:
> head/sys/kern/subr_smp.c
> head/sys/sys/smp.h
> head/sys/x86/x86/mp_x86.c
--
Andriy Gapon
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