accessing a PCIe register from userspace through kmem or other ways ?

[Konstantin Belousov]

On Fri, Apr 01, 2016 at 12:48:24PM -0400, Ryan Stone wrote:
> That is actually a really good question.  I know that with some recent
> BIOSes if I enabled allocating 64-bit addresses to BARs, the BAR would
> actually be mapped outside of the range of /dev/mem.  From a quick glance
> at libpciaccess, I don't think that it handles this case.  A specific
> mechanism for allowing mmaping of BARs would be useful, I think.

I am not sure what do you mean by 'outside of the range of /dev/mem'.
IMO /dev/mem (not kmem) handles every possible physical address both
for mmap(2) and for read(2)/write(2).  For io interface there were
some bugs, but they are believed to be fixed.  I mean amd64.