building i386 world on amd64 host: failed @svn

Dimitry Andric dim at FreeBSD.org
Fri Aug 16 12:33:35 UTC 2013


On Aug 15, 2013, at 21:38, Jung-uk Kim <jkim at FreeBSD.org> wrote:
> On 2013-08-15 15:30:49 -0400, Konstantin Belousov wrote:
>> On Thu, Aug 15, 2013 at 09:12:52PM +0200, Dimitry Andric wrote:
>>> On Aug 15, 2013, at 20:36, Konstantin Belousov
>>> <kostikbel at gmail.com> wrote:
>>>> Does the linux box defaults to pentium or higher for -march ? 
>>>> 64 bit atomics cannot be implemented in usermode on i386 on 
>>>> processors which do not have cmpxchg8b instruction.
>>> 
>>> Ah yes, you are totally right, with -v it gives:
>>> 
>>> COLLECT_GCC_OPTIONS='-O2' '-S' '-v' '-mtune=generic'
>>> '-march=i586'
>>> 
>>> So we should really disable atomics for i486 and lower?  Though I
>>> have understood that there also some pentiums without
>>> cmpxchg8b...
>> 
>> I do not think that there was any Pentium-branded CPU which did
>> not implemented cmpxchg8b.  Some late 486 did provided cpuid, but I
>> am almost certain that they did not have cmpxchg8b (cannot check
>> anyway).
> 
> It is actually little complicated.
> 
> http://www.geoffchappell.com/studies/windows/km/cpu/cx8.htm


In contrast, gcc's rules (in contrib/gcc/config/i386/i386.c) are pretty
straightforward:

  /* Compare and exchange was added for 80486.  */
  const int x86_cmpxchg = ~m_386;
  /* Compare and exchange 8 bytes was added for pentium.  */
  const int x86_cmpxchg8b = ~(m_386 | m_486);

So maybe the following is a safe enough solution for now:

Index: usr.bin/svn/svn_private_config.h
===================================================================
--- usr.bin/svn/svn_private_config.h    (revision 254300)
+++ usr.bin/svn/svn_private_config.h    (working copy)
@@ -153,7 +153,9 @@
 #define SVN_FS_WANT_DB_PATCH 14

 /* Define if compiler provides atomic builtins */
+#if !defined(__i386__) || !defined(__i486__)
 #define SVN_HAS_ATOMIC_BUILTINS 1
+#endif

 /* Is GNOME Keyring support enabled? */
 /* #undef SVN_HAVE_GNOME_KEYRING */

Those rules can be extended for other arches or CPUs that don't support
64-bit atomic operations.

-Dimitry



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