coretemp TjMax

[Xin LI]

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256

Hi,

On 12/04/10 13:59, Irakli wrote:
> Hi,
> 
> ns# cpucontrol -m 0x1a2 /dev/cpuctl0
> MSR 0x1a2: 0x00000000 0x00001600
> 
> ns# grep GenuineIntel /var/run/dmesg.boot
> Origin = "GenuineIntel"  Id = 0x6fb  Family = 6  Model = f  Stepping = 11

I didn't found any authoritative source that gives me 95.  Where did you
get the information?

Attached is a patch that uses 95C for stepping G0 but I'm really
clueless whether that's right.

> On Tue, Nov 23, 2010 at 5:13 PM, Xin LI <delphij at delphij.net
> <mailto:delphij at delphij.net>> wrote:
> 
> [Redirected to -current@]
> 
> Hi,
> 
> On 11/15/10 03:32, Irakli wrote:
>> Hi
>> coretemp gets wrong TjMax for Intel E6750 CPU (CPUID 06FBh), 85
> instead of
>> 95.
>> and therefore monitoring programs see low then room temperature
> (in air
>> cooling)
>> Please fix this and would be nice allowing users manual setting
> TjMax from
>> sysctl
> 
> Would you please provide the following information?
> 
> cpucontrol -m 0x1a2 /dev/cpuctl0
> 
> (kldload cpuctl if necessary).
> 
> And:
> 
> grep GenuineIntel /var/run/dmesg.boot
> 
> Thanks in advance!
> 
> Cheers,

- -- 
Xin LI <delphij at delphij.net>	http://www.delphij.net/
FreeBSD - The Power to Serve!	       Live free or die
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.16 (FreeBSD)

iQEcBAEBCAAGBQJM/TCpAAoJEATO+BI/yjfBoxwH/RzrcuHXjo8buG3suGheD2kP
4N1LNMR/lPzmlG9duhqPOE3Y7DsKqe/tiZ91QykyFmJylePHf5gAv+bASP8An+xv
piyq12ghePUoWsl9kYJwSBQ1wkvpkYf6RJ+mWIGTMp3+xpmEa9yyQnnE2AvSWAga
HduALNzJnqqxQwlHFFqi216ay79ItUPvJEWCGeP1AfGt3CJqg1aAJ8fY3rF7m37P
whWg89QqWu6U0WDJ2QFmzJxxtbyHIT9CUcGsJrpfZKVQf2kglPn0rPSLjaBTQcGK
RJMyOW3KI/LueSJ+PgvRNtaSVhhGL2cm4L9Mz2uo/vp5OVoe48oWn68dZgFkffw=
=MKgf
-----END PGP SIGNATURE-----
-------------- next part --------------
Index: coretemp.c
===================================================================
--- coretemp.c	(revision 216236)
+++ coretemp.c	(working copy)
@@ -178,8 +178,13 @@
 	 */
 	sc->sc_tjmax = 100;
 
-	if ((cpu_model == 0xf && cpu_stepping >= 2) || cpu_model == 0xe) {
+	if (cpu_model == 0xf && cpu_stepping == 11) {
 		/*
+		 * Use 95C for stepping G0
+		 */
+		sc->sc_tjmax = 95;
+	} else if ((cpu_model == 0xf && cpu_stepping >= 2) || cpu_model == 0xe) {
+		/*
 		 * On some Core 2 CPUs, there's an undocumented MSR that
 		 * can tell us if Tj(max) is 100 or 85.
 		 *