Fighting for the power.

Paul B. Mahol onemda at
Mon May 11 20:08:51 UTC 2009

On 5/11/09, Alexander Motin <mav at> wrote:
> Tim Kientzle wrote:
>> I started to try the "hint.apic.0.clock", but noticed
>> in your commit r191720:
>> Alexander Motin wrote:
>>> Add hint.apic.0.clock tunable. Setting it 0 disables using
>>> LAPIC timers as hard-/stat-/profclock sources falling back
>>> to using i8254 and rtc timers.
>>> ...
>>> This technique is not working for SMP yet, as only one CPU
>>> receives timer interrupts. But I think that problem could
>>> be fixed by forwarding interrupts to other CPUs with IPI.
>> Is anyone looking at this yet?
> I have implemented SMP support for i386 and amd64 in some of my later
> commits.

And all those hacks helps verry little in my case, most gain I get when
laptop monitor is switched off. Even switching hard disk off improves battery
life very little.

interrupt                          total       rate
irq1: atkbd0                        5206          3
irq0: clk                         156008         99
irq9: acpi0                         1152          0
irq12: psm0                        16092         10
irq14: ata0                         6587          4
irq15: ata1                            1          0
irq17: ndis0                       28646         18
irq256: hdac0                         18          0
Total                             213710        136


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