powerd adaptive mode latching

[Nate Lawson]

Igor Mozolevsky wrote:
> On 12/01/2008, Maxim Sobolev <sobomax at digifonica.com> wrote:
>> I wonder if somebody did measurement of power consumption with powerd
>> and without it on typical tasks. There is very interesting idea in the
>> last issue of ACM Queue that it might be much more beneficial to run CPU
>> at the full speed and then switch it to low-power mode as soon as
>> possible in the idle loop than to run longer at reduced speed for a
>> longer period of time.
> 
> That's a pretty neat idea, and will certainly get rid of the polling
> issue. The scheduler could scale the cpu clock, but I presume it would
> require some hacking effort...

Note that we've known this for a long time.  The ACPI CPU idling code
(C1-C3) aggressively tries to sleep a long time unless it has been woken
up by interrupts several times recently.  For powerd and Enhanced
Speedstep (no throttling), it's often best to run at the highest CPU
speed while tasks are runnable and then go straight to the lowest when
the user stops typing.  As time goes by, the latency for switching modes
keeps going down.

There's been a long outstanding request for someone to actually profile
some different algorithms instead of just suggest changes.  Kevin
Oberman did some of this but much more needs to be done before we have
an idea what's the best current thing to do.

-Nate