MCP68 AHCI Support

[M.R. Fremouw]

Hi,

It seems that FreeBSD 7.0 current does not support the Nvidia MCP68  
chipset in AHCI mode. To fix this I created a patch to add support for  
the MCP68. I also added the ID's for the pata ide controller to let it  
work in UDMA6 mode.

Maarten

The patch:
diff -Naur sys-orig/dev/ata/ata-all.h sys-nvidiaahci/dev/ata/ata-all.h
--- sys-orig/dev/ata/ata-all.h	2007-11-13 19:41:36.000000000 +0100
+++ sys-nvidiaahci/dev/ata/ata-all.h	2007-11-13 20:21:38.000000000 +0100
@@ -155,7 +155,7 @@
  #define ATA_AHCI_GHC                    0x04
  #define         ATA_AHCI_GHC_AE         0x80000000
  #define         ATA_AHCI_GHC_IE         0x00000002
-#define         ATA_AHCI_GHC_HR         0x80000001
+#define         ATA_AHCI_GHC_HR         0x00000001

  #define ATA_AHCI_IS                     0x08
  #define ATA_AHCI_PI                     0x0c
diff -Naur sys-orig/dev/ata/ata-chipset.c sys-nvidiaahci/dev/ata/ata- 
chipset.c
--- sys-orig/dev/ata/ata-chipset.c	2007-11-13 19:41:36.000000000 +0100
+++ sys-nvidiaahci/dev/ata/ata-chipset.c	2007-11-13 20:21:38.000000000  
+0100
@@ -453,6 +453,11 @@
      struct ata_pci_controller *ctlr = device_get_softc(dev);
      u_int32_t version;

+    /* enable AHCI mode, AE should be set high before calling reset
+       according to AHCI specifictions rev. 1.10, section 5.2.2.1 */
+    ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
+             ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_AE);
+
      /* reset AHCI controller */
      ATA_OUTL(ctlr->r_res2, ATA_AHCI_GHC,
  	     ATA_INL(ctlr->r_res2, ATA_AHCI_GHC) | ATA_AHCI_GHC_HR);
@@ -2931,6 +2936,9 @@
       { ATA_NFORCE_MCP61_S1, 0, 0,         NV4|NVQ, ATA_SA300,  
"nForce MCP61" },
       { ATA_NFORCE_MCP61_S2, 0, 0,         NV4|NVQ, ATA_SA300,  
"nForce MCP61" },
       { ATA_NFORCE_MCP61_S3, 0, 0,         NV4|NVQ, ATA_SA300,  
"nForce MCP61" },
+     { ATA_NFORCE_MCP68,    0, AMDNVIDIA, NVIDIA,  ATA_UDMA6, "nForce  
MCP68" },
+     { ATA_NFORCE_MCP68_S1, 0, 0,         AHCI,    ATA_SA300, "nForce  
MCP68" },
+     { ATA_NFORCE_MCP68_S2, 0, 0,         AHCI,    ATA_SA300, "nForce  
MCP68" },
       { 0, 0, 0, 0, 0, 0}} ;
      char buffer[64] ;

@@ -2963,6 +2971,9 @@
  						   &ctlr->r_rid2, RF_ACTIVE))) {
  	    int offset = ctlr->chip->cfg2 & NV4 ? 0x0440 : 0x0010;

+            if(ctlr->chip->cfg2 == AHCI)
+                return ata_ahci_chipinit(dev);
+
  	    ctlr->allocate = ata_nvidia_allocate;
  	    ctlr->reset = ata_nvidia_reset;

diff -Naur sys-orig/dev/ata/ata-pci.h sys-nvidiaahci/dev/ata/ata-pci.h
--- sys-orig/dev/ata/ata-pci.h	2007-11-13 19:41:36.000000000 +0100
+++ sys-nvidiaahci/dev/ata/ata-pci.h	2007-11-13 20:21:38.000000000 +0100
@@ -232,6 +232,9 @@
  #define ATA_NFORCE_MCP61_S1     0x03e710de
  #define ATA_NFORCE_MCP61_S2     0x03f610de
  #define ATA_NFORCE_MCP61_S3     0x03f710de
+#define ATA_NFORCE_MCP68        0x056010de // PATA IDE
+#define ATA_NFORCE_MCP68_S1     0x055410de // AHCI
+#define ATA_NFORCE_MCP68_S2     0x058410de // Linux AHCI

  #define ATA_PROMISE_ID          0x105a
  #define ATA_PDC20246            0x4d33105a