Page table walk on TLB miss

[Martin Cracauer]

Can somebody explain how the MMU walks the page table in RAM when
there is a TLB miss and where the FreeBSD code is that sets up the
tables?

Is there actual OS code involved in the walking or does the OS just
set up the code and the MMU walks on it's own?

Mostly interested in AMD64.

Thanks
	Martin
-- 
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Martin Cracauer <cracauer at cons.org>   http://www.cons.org/cracauer/
FreeBSD - where you want to go, today.      http://www.freebsd.org/