STI, HLT in acpi_cpu_idle_c1

Gerrit Nagelhout gnagelhout at
Mon Jun 28 06:54:23 PDT 2004

John Baldwin wrote:
> Hmm, it appears it is consistently CPU1 that thinks that 
> being EOI'd.  Can you try swapping the CPUs and see if the 
> lockup moves from 
> CPU1 to CPU3?
> -- 

I added the following *HACK* to the idle code, and let it run
over the weekend (with halt on idle disabled).  It hit the function
isr_problem 9 times, but did not lockup anymore.  The problem
is that I don't know if the EOI just got lost, or whether the
interrupt was not handled at all.  I couldn't find any ill effects
from this code ... yet.

extern volatile lapic_t *lapic;
void isr_problem(void);
int isrProblem=0;
void isr_problem()
    lapic->eoi = 0;

	u_int mask = PCPU_GET(cpumask);
	int retval;

        if(lapic->isr7 != 0) {

	retval = mask & hlt_cpus_mask;
	while (mask & hlt_cpus_mask)
		__asm __volatile("sti; hlt" : : : "memory");
	return (retval);

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