How to determine the L2 cache size on non-AMD CPUs (automatic
page queue color tuning)?
Alexander at Leidinger.net
Sun Jun 20 19:27:31 GMT 2004
On Wed, 16 Jun 2004 09:35:40 -0700 (PDT)
John Polstra <jdp at polstra.com> wrote:
> Yes, but it gives working code that generally shows how to get the
> information. Here's a link to an Intel document "Intel(R) Processor
> Idientification and the CPUID Instruction" that covers the newer CPUs:
Thanks, based upon the docs from Intel I've a version up and running
FreeBSD 5.2-CURRENT #34: Sun Jun 20 21:04:28 CEST 2004
root at M87.Leidinger.net:/system/usr_src/sys/i386/compile/M87
Using 16 colors for the VM-PQ tuning (512, 8)
Preloaded elf kernel "/boot/kernel/kernel" at 0xc08a9000.
CPU: Intel(R) Pentium(R) 4 CPU 2.40GHz (2405.46-MHz 686-class CPU)
Origin = "GenuineIntel" Id = 0xf29 Stepping = 9
Hyperthreading: 2 logical CPUs
Instruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries
Data TLB: 4-KB or 4-MB pages, fully associative, 64 entries
1st-level data cache: 8-KB, 4-way set associative, sectored cache, 64-byte line size
Trace cache: 12K-uops, 8-way set associative
2nd-level cache: 512-KB, 8-way set associative, sectored cache, 64-byte line size
real memory = 1073676288 (1023 MB)
>From a feature point of view I don't have anything on my TODO list for
this patch (I need to test the universe and fixup some '#if 0' parts).
If someone wants to play a little bit with it, it's at
It should also take a L3 cache into account, if available.
It would be nice if someone could review it. I'm not entirely satisfied
with the identcpu.c part, but I don't know enough of the big picture of
the kernel to provide a cleaner patch. Hints/suggestions are welcome.
I'm available to get hired (preferred in .lu).
http://www.Leidinger.net Alexander @ Leidinger.net
GPG fingerprint = C518 BC70 E67F 143F BE91 3365 79E2 9C60 B006 3FE7
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