Atomic operations on i386/amd64
Bruce M Simpson
bms at spc.org
Thu Aug 5 19:31:06 PDT 2004
On Thu, Aug 05, 2004 at 04:15:32PM -0600, Scott Long wrote:
> >>Is there any particular reason why atomic_load_acq_*() and
> >>atomic_store_rel_*() are implemented with CMPXCHG and XCHG instead of
> >>MOV on i386/amd64 UP?
Have a look at Linux. They ended up doing a runtime self-modifying kernel
hack so they could ship generic kernels which used the appropriate locking
instructions on each x86 family CPU.
BMS
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