Is there any particular reason why atomic_load_acq_*() and atomic_store_rel_*() are implemented with CMPXCHG and XCHG instead of MOV on i386/amd64 UP? Also, could we use MFENCE/LFENCE/SFENCE in combination with MOV on SMP systems instead of LOCK CMPXCHG / (implied LOCK) XCHG? Tim