Atomic operations on i386/amd64

Tim Robbins tjr at
Wed Aug 4 22:04:52 PDT 2004

Is there any particular reason why atomic_load_acq_*() and
atomic_store_rel_*() are implemented with CMPXCHG and XCHG instead of
MOV on i386/amd64 UP?

Also, could we use MFENCE/LFENCE/SFENCE in combination with MOV on
SMP systems instead of LOCK CMPXCHG / (implied LOCK) XCHG?


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