HEADSUP: Committing new interrupt code, tree will be broken

Peter Wemm peter at wemm.org
Mon Nov 3 17:25:31 PST 2003

John Baldwin wrote:
> On 03-Nov-2003 John Baldwin wrote:
> > I'm committing the new i386 interrupt and SMP code, so buckle your
> > seat belts. :)  I'll be intentionally breaking the kernel build at
> > the start and re-enable it with the last commit when I am done.
> I've finished committing everything but am waiting for some kernel
> compiles on virgin trees to finish to make sure I didn't miss anything.
> The -current waters should be safe again though.

ref5.freebsd.org updated ok (no MADT or mptable in bios)
builder.freebsd.org updated ok (no MADT or mptable in bios)
the quad xeon-550 at work updated fine.. multiple IO apics and all.  (I had
  to make a PAE fix for i386/acpica/madt.c though)

ACPI APIC Table: <INTEL  SKA4    >
CPU: Pentium III/Pentium III Xeon/Celeron (549.44-MHz 686-class CPU)
  Origin = "GenuineIntel"  Id = 0x673  Stepping = 3
real memory  = 6442450944 (6144 MB)
avail memory = 5828734976 (5558 MB)
FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
 cpu0 (BSP): APIC ID:  3
 cpu1 (AP): APIC ID:  0
 cpu2 (AP): APIC ID:  1
 cpu3 (AP): APIC ID:  2
ioapic0 <Version 17> irqs 0-15 on motherboard
ioapic1 <Version 17> irqs 16-31 on motherboard

Peter Wemm - peter at wemm.org; peter at FreeBSD.org; peter at yahoo-inc.com
"All of this is for nothing if we don't go to the stars" - JMS/B5

More information about the freebsd-current mailing list